Digital Systems Design with VHDL and Synthesis: An Integrated Approach

K. C. Chang

  • 出版商: IEEE
  • 出版日期: 1999-05-11
  • 售價: $1,100
  • 貴賓價: 9.5$1,045
  • 語言: 英文
  • 頁數: 516
  • 裝訂: Hardcover
  • ISBN: 0769500234
  • ISBN-13: 9780769500232
  • 無法訂購

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Table of Contents:

Chapter 1: Introduction.

Chapter 2: VHDL and Digital Circuit Primitives.

Chapter 3: VHDL Simulation and Synthesis Environment and Design Process.

Chapter 4: Basic Combinational Circuits.

Chapter 5: Basic Binary Arithmetic Circuits.

Chapter 6: Basic Sequential Circuits.

Chapter 7: Registers.

Chapter 8: Clock and Reset Circuits.

Chapter 9: Dual-Port RAM, FIFO, and DRAM Modeling.

Chapter 10: A Design Case Study: Finite Impulse Response Filter ASIC Design.

Chapter 11: A Design Case Study: A Microprogram Controller Design.

Chapter 12: Error Detection and Correction.

Chapter 13: Fixed-Point Multiplication.

Chapter 14: Fixed-Point Division.

Chapter 15: Floating-Point Arithmetic.

Appendix A: Package Pack.

Index.