Power Distribution Network Design for VLSI

Qing K. Zhu

  • 出版商: Wiley
  • 出版日期: 2004-02-19
  • 售價: $4,510
  • 貴賓價: 9.5$4,285
  • 語言: 英文
  • 頁數: 207
  • 裝訂: Hardcover
  • ISBN: 0471657204
  • ISBN-13: 9780471657200
  • 相關分類: VLSI
  • 海外代購書籍(需單獨結帳)

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商品描述

Description:

A hands-on troubleshooting guide for VLSI network designers
The primary goal in VLSI (very large scale integration) power network design is to provide enough power lines across a chip to reduce voltage drops from the power pads to the center of the chip. Voltage drops caused by the power network's metal lines coupled with transistor switching currents on the chip cause power supply noises that can affect circuit timing and performance, thus providing a constant challenge for designers of high-performance chips.
Power Distribution Network Design for VLSI provides detailed information on this critical component of circuit design and physical integration for high-speed chips. A vital tool for professional engineers (especially those involved in the use of commercial tools), as well as graduate students of engineering, the text explains the design issues, guidelines, and CAD tools for the power distribution of the VLSI chip and package, and provides numerous examples for its effective application.
Features of the text include:
* An introduction to power distribution network design
* Design perspectives, such as power network planning, layout specifications, decoupling capacitance insertion, modeling, and analysis
* Electromigration phenomena
* IR drop analysis methodology
* Commands and user interfaces of the VoltageStorm(TM) CAD tool
* Microprocessor design examples using on-chip power distribution
* Flip-chip and package design issues
* Power network measurement techniques from real silicon
The author includes several case studies and a glossary of key words and basic terms to help readers understand and integrate basic concepts in VLSI design and power distribution.

 

Table of Contents:

Preface.

1 Introduction.

1.1 Power Supply Noise.

1.2 Power Network Modeling.

1.3 Modelling of Switching Currents.

1.4 On-Chip Decoupling Capacitance.

1.5 On-Chip Inductance.

1.6 Process Scaling Impacts.

1.7 Summary.

2 Design Perspectives.

2.1 Planning for Communication Chips.

2.2 Planning for Microprocessor Chips.

2.3 IBM CAD Methodology.

2.4 Design for IR Drop.

2.5 Package-Level Methodology.

2.6 Summary.

3 Electromigration.

3.1 Basic Definitions and EM Rules.

3.2 EM Analysis Tool.

3.3 Full-Chip EM Methodology.

3.4 Summary.

4 IR Voltage Drop.

4.1 Causes of IR Drop.

4.2 Overview of IR Analysis.

4.3 Static Analysis Approach.

4.4 Dynamic Analysis Approach.

4.5 Circuit Analysis with IR Drop Impacts.

4.6 Summary.

5 Power Grid Analysis.

5.1 Introduction.

5.2 Executing the Tool.

5.3 Advanced Static Analysis.

5.4 Dynamic Analysis.

5.5 Layout Exploration.

5.6 Summary.

6 Microprocessor Design Examples.

6.1 Intel IA-32 Pentium-III.

6.2 Sun UltraSPARC.

6.3 Hitachi SuperH Microprocessor.

6.4 IBM S/390 Microprocessor.

6.5 Sun SPARC 64b Microprocessor.

6.6 Intel IA-64 Microprocessor.

6.7 Summary.

7 Package and I/O Design for Power Delivery.

7.1 Flip-Chip Package.

7.2 Simultaneous Switching Noise (SSN).

7.3 Case Study of a Microprocessor-Like Chip.

7.4 Power Supply Measurement.

7.5 I/O Pads for Power/Ground Supplies.

Glossary.

References.

Index.

商品描述(中文翻譯)

描述:
這是一本針對VLSI(超大規模積體電路)網路設計師的實用故障排除指南。VLSI電源網路設計的主要目標是在晶片上提供足夠的電源線,以減少從電源墊到晶片中心的電壓降。電源網路的金屬線與晶片上的晶體管開關電流結合,會產生影響電路時序和性能的電源噪音,因此對於高性能晶片的設計師來說,這是一個持續的挑戰。《VLSI電源分配網路設計》提供了關於這一關鍵電路設計和物理整合組件的詳細信息,對於專業工程師(尤其是那些使用商業工具的工程師)以及工程學研究生來說,這是一個重要的工具。本書解釋了VLSI晶片和封裝的電源分配的設計問題、指南和CAD工具,並提供了多個實際應用的例子。

本書的特點包括:
- 電源分配網路設計的介紹
- 設計觀點,如電源網路規劃、佈局規範、解耦電容插入、建模和分析
- 電遷移現象
- IR降壓分析方法
- VoltageStorm(TM) CAD工具的命令和用戶界面
- 使用片上電源分配的微處理器設計示例
- 焊接封裝和封裝設計問題
- 從實際硅片中獲取的電源網路測量技術

作者還包括了幾個案例研究和關鍵詞和基本術語的詞彙表,以幫助讀者理解和整合VLSI設計和電源分配的基本概念。

目錄:
前言
1. 簡介
1.1 電源供應噪音
1.2 電源網路建模
1.3 開關電流建模
1.4 片上解耦電容
1.5 片上電感
1.6 製程縮放影響
1.7 總結
2. 設計觀點
2.1 通信晶片規劃
2.2 微處理器晶片規劃
2.3 IBM CAD方法論
2.4 IR降壓設計
2.5 封裝層方法論
2.6 總結
3. 電遷移
3.1 基本定義和電遷移規則
3.2 電遷移分析工具
3.3 全片電遷移方法論
3.4 總結
4. IR電壓降
4.1 IR降壓的原因
4.2 IR分析概述