Co-verification of Hardware and Software for ARM SoC Design (Paperback)

Jason Andrews

  • 出版商: Newnes
  • 出版日期: 2004-08-30
  • 定價: $1,980
  • 售價: 5.0$990
  • 語言: 英文
  • 頁數: 288
  • 裝訂: Paperback
  • ISBN: 0750677309
  • ISBN-13: 9780750677301
  • 相關分類: ARM
  • 立即出貨(限量)

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商品描述

Description:

Hardware/software co-verification is how to make sure that embedded system software works correctly with the hardware, and that the hardware has been properly designed to run the software successfully -before large sums are spent on prototypes or manufacturing.

This is the first book to apply this verification technique to the rapidly growing field of embedded systems-on-a-chip(SoC). As traditional embedded system design evolves into single-chip design, embedded engineers must be armed with the necessary information to make educated decisions about which tools and methodology to deploy. SoC verification requires a mix of expertise from the disciplines of microprocessor and computer architecture, logic design and simulation, and C and Assembly language embedded software. Until now, the relevant information on how it all fits together has not been available. Andrews, a recognized expert, provides in-depth information about how co-verification really works, how to be successful using it, and pitfalls to avoid. He illustrates these concepts using concrete examples with the ARM core - a technology that has the dominant market share in embedded system product design. The companion CD-ROM contains all source code used in the design examples, a searchable e-book version, and useful design tools.

 

 

Table of Contents:

1. Embedded System Verification
2. Hardware and Software Design Process: System initialization software and hardware abstraction layer (HAL), Hardware diagnostic test suite, Real-time operating system (RTOS), RTOS device drivers, Application software, C simulation, Logic simulation, Simulation acceleration, Emulation, Prototype;
3. SoC Verification Topics for the ARM Architecture;
4. Hardware/Software Co-Verification: Host-code execution - implicit access, ISS + BIM, CCM, RTL, Hardware model,Emulation board, FPGA Prototype;
5. Advanced Hardware/Software Co-Verification: Direct access to simulation memories without advancing simulation time, Memory and time optimizations - understanding synchronization, Cross network connections versus using a single workstation, C modeling for some of the hardware, Implicit Access,Post-processing techniques for software debugging, Synchronized software and hardware views for debugging, Post-processing software trace, Save/restore, How to deal with peripherals, How to deal with an RTOS;
6. Hardware Verification Environment and
Co-Verification: Testbench, The use of testbench tools, Random test generation based on CPU address map, CPU bus protocol checking, Functional/ Transaction coverage, Memory coverage, Property checking - did a specific scenario ever happen? Use of a design signoff model;
7. Methodology for an Example ARM SoC.

商品描述(中文翻譯)

描述:
硬體/軟體共同驗證是確保嵌入式系統軟體與硬體正確運作,並確保硬體已經適當設計以成功執行軟體,而不需要在原型機或製造上花費大筆金錢。這是第一本將這種驗證技術應用於快速成長的片上系統(SoC)領域的書籍。隨著傳統嵌入式系統設計演變為單晶片設計,嵌入式工程師必須掌握必要的資訊,以便在部署工具和方法論時做出明智的決策。SoC驗證需要來自微處理器和計算機架構、邏輯設計和模擬、C和組合語言嵌入式軟體等學科的專業知識結合。迄今為止,有關如何將所有這些結合在一起的相關資訊尚未提供。作為一位公認的專家,Andrews提供了關於共同驗證的深入資訊,以及如何成功使用它和避免陷阱。他使用ARM核心作為具體示例來說明這些概念,ARM核心在嵌入式系統產品設計中佔有主導地位。附帶的CD-ROM包含所有設計示例中使用的源代碼、可搜索的電子書版本和有用的設計工具。

目錄:
1. 嵌入式系統驗證
2. 硬體和軟體設計流程:系統初始化軟體和硬體抽象層(HAL)、硬體診斷測試套件、即時作業系統(RTOS)、RTOS設備驅動程式、應用軟體、C模擬、邏輯模擬、模擬加速、仿真、原型機
3. ARM架構的SoC驗證主題
4. 硬體/軟體共同驗證:主機代碼執行-隱式存取、ISS + BIM、CCM、RTL、硬體模型、仿真板、FPGA原型機
5. 高級硬體/軟體共同驗證:在不推進仿真時間的情況下直接存取仿真記憶體、記憶體和時間優化-理解同步、跨網路連接與使用單個工作站、部分硬體的C建模、隱式存取、軟體調試的後處理技術、用於調試的同步軟體和硬體視圖、後處理軟體追蹤、保存/還原、如何處理外設、如何處理RTOS
6. 硬體驗證環境和共同驗證:測試台、測試台工具的使用、基於CPU位址映射的隨機測試生成、CPU匯流排協議檢查、功能/事務覆蓋率、記憶體覆蓋率、屬性檢查-特定情境是否發生過?使用設計簽署模型
7. 一個示例ARM SoC的方法論。