相關主題
商品描述
The International conference on Semiconductor Materials packaging, AI&ML, Reconfigurable VLSI architectures for IoT, future Communication Technologies ("SMART-2024") aimed to provide a platform for researchers, academicians, industry experts, and practitioners to exchange ideas, present research findings, and discuss emerging trends and challenges in the specified fields. "SMART-2024" seeked to foster collaboration, innovation, and knowledge dissemination by bringing together experts and stakeholders from diverse backgrounds to address key issues and explore new research directions. The conference targeted a diverse audience including researchers, academicians, scientists, engineers, technologists, industry professionals, students, policymakers, and other stakeholders interested in VLSI, IoT, AI-ML, communication systems, semiconductor packaging, hetero architecture devices, and Nano materials.
商品描述(中文翻譯)
國際半導體材料封裝、人工智慧與機器學習、可重構的 VLSI 架構於物聯網及未來通訊技術的會議（'SMART-2024'）旨在為研究人員、學術界、業界專家及實務工作者提供一個交流想法、展示研究成果及討論指定領域中新興趨勢與挑戰的平台。'SMART-2024' 旨在促進合作、創新及知識傳播，通過聚集來自不同背景的專家與利益相關者，共同解決關鍵問題並探索新的研究方向。此次會議的目標受眾包括研究人員、學者、科學家、工程師、技術專家、業界專業人士、學生、政策制定者及其他對 VLSI、物聯網、人工智慧與機器學習、通訊系統、半導體封裝、異構架構裝置及奈米材料感興趣的利益相關者。
作者簡介
T. Vasudeva Reddy is an Associate Professor in Electronics and Communication Engineering (ECE), B V RAJU Institute of Technology, Narsapur. His expertise lies in enhancing electronic system efficiency, focusing on power consumption, area utilization, and signal delay optimization. His research encompasses Low Power SRAM Architectures, Sub-threshold SRAM Designs, and MEMS Devices for Coagulation Effect, supported by a rich publication record and a commitment to innovative research.
K. Madhava Rao, Assistant Professor at B V RAJU Institute of Technology, Narsapur since 2016, boasts a comprehensive exploration and contribution to electronics and communication engineering. His research covers hardware implementation, low-power techniques, FPGA-based systems, and advanced memory designs, presented at international conferences and esteemed journals.
作者簡介(中文翻譯)
T. Vasudeva Reddy 是位於 Narsapur 的 B V RAJU Institute of Technology 電子與通信工程 (ECE) 的副教授。他的專長在於提升電子系統的效率，專注於功耗、面積利用和信號延遲優化。他的研究涵蓋低功耗 SRAM 架構、亞閾值 SRAM 設計以及用於凝固效應的 MEMS 裝置，並擁有豐富的出版紀錄和對創新研究的承諾。
K. Madhava Rao 自 2016 年以來擔任位於 Narsapur 的 B V RAJU Institute of Technology 的助理教授，對電子與通信工程進行了全面的探索和貢獻。他的研究涵蓋硬體實現、低功耗技術、基於 FPGA 的系統以及先進的記憶體設計，並在國際會議和知名期刊上發表。
