Spark: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits

Description

Rapid advances in microelectronic integration and the advent of Systems-on-Chip have fueled the need for high-level synthesis, i.e., an automated approach to the synthesis of hardware from behavioral descriptions.

SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits presents a novel approach to the high-level synthesis of digital circuits -- that of parallelizing high-level synthesis (PHLS). This approach uses aggressive code parallelizing and code motion techniques to discover circuit optimization opportunities beyond what is possible with traditional high-level synthesis. This PHLS approach addresses the problems of the poor quality of synthesis results and the lack of controllability over the transformations applied during the high-level synthesis of system descriptions with complex control flows, that is, with nested conditionals and loops.
Also described are speculative code motion techniques and dynamic compiler transformations that optimize the circuit quality in terms of cycle time, circuit size and interconnect costs. We describe the SPARK parallelizing high-level synthesis framework in which we have implemented these techniques and demonstrate the utility of SPARK's PHLS approach using designs derived from multimedia and image processing applications. We also present a case study of an instruction length decoder derived from the Intel Pentium-class of microprocessors. This case study serves as an example of a typical microprocessor functional block with complex control flow and demonstrates how our techniques are useful for such designs.

SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits is targeted mainly to embedded system designers and researchers. This includes people working on design and design automation. The book is useful for researchers and design automation engineers who wish to understand how the main problems hindering the adoption of high-level synthesis among designers.

描述

快速的微電子整合和系統單晶片的出現推動了對高層次綜合的需求，即從行為描述自動合成硬體的方法。《SPARK：數位電路高層次綜合的並行化方法》介紹了一種新的數位電路高層次綜合方法，即並行化高層次綜合（PHLS）。該方法使用積極的程式並行化和程式移動技術，以發現傳統高層次綜合無法實現的電路優化機會。這種PHLS方法解決了在具有複雜控制流程（即嵌套條件和迴圈）的系統描述的高層次綜合中，綜合結果質量差和轉換控制性不足的問題。此外，還介紹了推測性程式移動技術和動態編譯器轉換，以在循環時間、電路大小和互連成本方面優化電路質量。我們描述了SPARK並行化高層次綜合框架，其中實現了這些技術，並展示了SPARK的PHLS方法在多媒體和影像處理應用中的實用性。我們還提供了一個來自Intel Pentium系列微處理器的指令長度解碼器的案例研究。這個案例研究是一個具有複雜控制流程的典型微處理器功能塊的例子，並展示了我們的技術對於這樣的設計是有用的。

《SPARK：數位電路高層次綜合的並行化方法》主要針對嵌入式系統設計師和研究人員。這包括從事設計和設計自動化工作的人員。本書對於希望了解阻礙設計師採用高層次綜合的主要問題的研究人員和設計自動化工程師非常有用。