Reconfigurable Obfuscation Techniques for the IC Supply Chain: Using Fpga-Like Schemes for Protection of Intellectual Property
暫譯: 可重構的IC供應鏈混淆技術：使用類FPGA方案保護智慧財產權
Abideen, Zain Ul, Pagliarini, Samuel
相關主題
商品描述
This book explores the essential facets of security threats arising from the globalized IC supply chain. Contemporary semiconductor companies navigate a globalized IC supply chain, exposing them to various threats such as Intellectual Property (IP) piracy, reverse engineering, overproduction, and malicious logic insertion. Several obfuscation techniques, including split manufacturing, design camouflaging, and Logic Locking (LL), have been proposed to counter these threats. This book describes a new security method for the silicon industry, the Tunable Design Obfuscation Technique, which uses a reconfigurability feature in the chip to make it harder to understand and protect it from rogue elements.
In addition, this book:
- Offers insight into the threats faced by the globalized IC supply chain and state-of-the-art countermeasures available
- Provides succinct introductions to key topics, with references as needed for further technical depth
- Introduces and explains a novel, reconfigurable-based obfuscation method, the Tunable Design Obfuscation Technique
商品描述(中文翻譯)
本書探討了全球化集成電路（IC）供應鏈所帶來的安全威脅的基本面向。當代半導體公司在全球化的IC供應鏈中運作，這使它們面臨各種威脅，例如智慧財產權（IP）盜竊、逆向工程、過度生產和惡意邏輯插入。為了應對這些威脅，提出了幾種混淆技術，包括分割製造、設計偽裝和邏輯鎖定（Logic Locking, LL）。本書描述了一種針對矽產業的新安全方法，即可調設計混淆技術（Tunable Design Obfuscation Technique），該技術利用晶片中的可重構特性，使其更難以理解並保護其免受惡意元素的侵害。
此外，本書：
- 提供對全球化IC供應鏈所面臨威脅的深入見解，以及現有的最先進對策
- 簡明扼要地介紹關鍵主題，並根據需要提供參考以深入技術內容
- 介紹並解釋一種新穎的基於可重構的混淆方法，即可調設計混淆技術
作者簡介
Zain Ul Abideen received his Ph.D. from Tallinn University of Technology (TalTech), Tallinn, Estonia, and his M.S. degree in computer engineering (Master in Integration, Security and Trust in Embedded systems) from Grenoble Institute of Technology, Grenoble, France. He is currently a postdoctoral researcher at Carnegie Mellon University, Pittsburgh, PA, USA. His research primarily focuses on ASIC design, hardware security, PUFs, TRNGs, reliable hardware designs, and post-quantum cryptography.
Samuel Pagliarini received his PhD from Telecom ParisTech, Paris, France, in 2013. He has held research positions with the University of Bristol, Bristol, UK, and Carnegie Mellon University, Pittsburgh, PA, USA. From 2019 to 2023, he led the Centre for Hardware Security at Tallinn University of Technology in Tallinn, Estonia. He is currently a professor at Carnegie Mellon University, Pittsburgh, PA, USA.
作者簡介(中文翻譯)
Zain Ul Abideen 於愛沙尼亞塔林的塔林科技大學 (TalTech) 獲得博士學位，並於法國格勒諾布爾的格勒諾布爾科技大學獲得計算機工程碩士學位（嵌入式系統的整合、安全性和信任碩士）。他目前是美國賓夕法尼亞州匹茲堡的卡內基梅隆大學的博士後研究員。他的研究主要集中在 ASIC 設計、硬體安全、物理不可克隆函數 (PUFs)、真隨機數生成器 (TRNGs)、可靠的硬體設計以及後量子密碼學。
Samuel Pagliarini 於 2013 年在法國巴黎的巴黎電信技術學院 (Telecom ParisTech) 獲得博士學位。他曾在英國布里斯托大學和美國賓夕法尼亞州匹茲堡的卡內基梅隆大學擔任研究職位。從 2019 年到 2023 年，他在愛沙尼亞塔林的塔林科技大學領導硬體安全中心。目前，他是美國賓夕法尼亞州匹茲堡的卡內基梅隆大學的教授。
