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出版商:
Springer
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出版日期:
2025-05-13
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售價:
$2,170
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貴賓價:
9.5 折
$2,062
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語言:
英文
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頁數:
111
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裝訂:
Quality Paper - also called trade paper
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ISBN:
3031921070
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ISBN-13:
9783031921070
商品描述
This book provides a structured and comprehensive pathway through the complexities of Electronic Design Automation (EDA) tools and processes. It focuses on OpenLane and Caravel EDA tools, due to their current major role in the open-source IC design ecosystem. OpenLane provides a robust and flexible platform that automates the entire digital design flow from Register Transfer Level (RTL) to Graphic Data System II (GDSII), making it an ideal tool for teaching and learning the physical design process. Caravel, on the other hand, serves as an open-source System on a Chip (SoC) platform, allowing designers to integrate and test their designs in a versatile, real-world environment. It complements OpenLane by enabling users to package and validate their designs, bridging the gap between theoretical knowledge and practical implementation. Together, these tools provide a way to understand the full tape-out process in a way that is accessible to students, researchers, and professionals alike.
商品描述(中文翻譯)
本書提供了一條結構化且全面的途徑，幫助讀者理解電子設計自動化（Electronic Design Automation, EDA）工具和流程的複雜性。由於 OpenLane 和 Caravel EDA 工具在開源集成電路（IC）設計生態系統中扮演著重要角色，因此本書特別聚焦於這兩者。OpenLane 提供了一個穩健且靈活的平台，自動化整個數位設計流程，從寄存器傳輸級（Register Transfer Level, RTL）到圖形數據系統 II（Graphic Data System II, GDSII），使其成為教學和學習物理設計過程的理想工具。另一方面，Caravel 作為一個開源的系統單晶片（System on a Chip, SoC）平台，允許設計師在多樣化的現實環境中整合和測試他們的設計。它通過使使用者能夠打包和驗證他們的設計，來補充 OpenLane，縮短理論知識與實際實施之間的距離。這些工具共同提供了一種理解完整的製造流程的方法，讓學生、研究人員和專業人士都能輕鬆接觸。
作者簡介
Susana Ortega-Cisneros received her BSc degree in communications and electronics from the Universidad Autónoma de Guadalajara, México, in 1990, the MSc degree from the Center for Research and Advanced Studies (CINVESTAV), México City, México, and the PhD degree in computer science and telecommunications from the Autonomous University of Madrid, Spain. She is currently with CINVESTAV and specializes in the design of digital architectures based on field-programmable gate arrays (FPGAs), DSPs, and microprocessors. Emilio Isaac Baungarten Leon has been a professor at Universidad Autónoma de Guadalajara for five years and has been working with Susana Ortega-Cisneros since 2019. He has authored multiple journal and conference papers and has several years of expertise and hands-on experience with OpenLane and Caravel. Pedro Mejia-Alvarez received his BSc degree in computer systems from ITESM, Querétaro, Mexico, in 1985, his PhD degree in Informatics from the Polytechnic University of Madrid, Spain, in 1995. He pursued his PostDoc Research at the Computer Science Department of the University of Pittsburgh in 1999-2000. He has been a Professor with the CINVESTAV-Guadalajara since 1997. His research interests include Real-Time Systems, Software Testing and Software Engineering. In his early career, he was involved the development of a 16-processor computing system for Mexico's National Electrical Industry to automate SCADA systems--both hardware (Intel-based) and software.
作者簡介(中文翻譯)
蘇珊娜·奧爾特加-西斯內羅斯於1990年在墨西哥瓜達拉哈拉自治大學獲得通信與電子學的學士學位，隨後在墨西哥城的高級研究中心（CINVESTAV）獲得碩士學位，並在西班牙馬德里自治大學獲得計算機科學與電信的博士學位。她目前在CINVESTAV工作，專注於基於現場可編程閘陣列（FPGAs）、數位信號處理器（DSPs）和微處理器的數位架構設計。 埃米利奧·艾薩克·鮑恩加滕·萊昂在瓜達拉哈拉自治大學擔任教授已有五年，並自2019年以來與蘇珊娜·奧爾特加-西斯內羅斯合作。他已發表多篇期刊和會議論文，並在OpenLane和Caravel方面擁有數年的專業知識和實務經驗。 佩德羅·梅希亞-阿爾瓦雷斯於1985年在墨西哥克雷塔羅的ITESM獲得計算機系統的學士學位，並於1995年在西班牙馬德里理工大學獲得資訊學的博士學位。他於1999年至2000年在匹茲堡大學計算機科學系進行博士後研究。自1997年以來，他一直是CINVESTAV-瓜達拉哈拉的教授。他的研究興趣包括即時系統、軟體測試和軟體工程。在早期的職業生涯中，他參與了為墨西哥國家電力工業開發一個16處理器計算系統，以自動化SCADA系統——包括硬體（基於Intel）和軟體。
