Next-Generation Floating-Point Arithmetic Unit
暫譯: 下一代浮點運算單元
Gudivada, A. Arunkumar, Jagadeeswara Rao, Emandi
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商品描述
The Next-Generation Floating-Point Arithmetic Unit Using QCA for Low-Power Applications explores the use of Quantum-dot Cellular Automata for implementing a Floating-Point Arithmetic Unit at the Nano-scale, overcoming limitations of CMOS technology. The research involves designing efficient QCA-based 1-bit and 8-bit full adders, multipliers, and a novel Tree-Based Stack-Type comparator. The proposed FPAU is tested through the implementation of a Fast Fourier Transform algorithm, demonstrating significant improvements in area, power dissipation, and delay compared to existing CMOS-based architectures.
商品描述(中文翻譯)
《下一代浮點運算單元:使用量子點細胞自動機於低功耗應用》探討了在奈米尺度上使用量子點細胞自動機(Quantum-dot Cellular Automata, QCA)來實現浮點運算單元,克服了CMOS技術的限制。該研究涉及設計高效的基於QCA的1位元和8位元全加器、乘法器,以及一種新穎的樹狀堆疊型比較器。所提出的浮點運算單元(FPAU)通過實現快速傅立葉變換(Fast Fourier Transform, FFT)演算法進行測試,顯示出在面積、功耗和延遲方面相較於現有的CMOS架構有顯著的改善。