Design Automation for Differential MOS Current-Mode Logic Circuits
暫譯: 差分MOS電流模式邏輯電路的設計自動化

Design Automation for Differential MOS Current-Mode Logic Circuits provides a very detailed and comprehensive analysis of fundamental MCML circuits, their design and performance optimization under competing constraints such as output drive capability, power dissipation, noise margin, and silicon area. A systematic methodology is presented to build efficient MCML standard-cell libraries, and a complete top-down design flow is shown to implement complex systems using such building blocks. As such, Design Automation for Differential MOS Current-Mode Logic Circuits presents one of the first-ever top-down design approaches using differential cells, for high performance and low noise operation.