High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip (Computer Architecture and Design Methodologies)

Zheng Wang, Anupam Chattopadhyay

  • 出版商: Springer
  • 出版日期: 2017-07-05
  • 售價: $4,460
  • 貴賓價: 9.5$4,237
  • 語言: 英文
  • 頁數: 197
  • 裝訂: Hardcover
  • ISBN: 9811010722
  • ISBN-13: 9789811010729
  • 海外代購書籍(需單獨結帳)


This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures.