Electronic Design Automation: Synthesis, Verification, and Test (Hardcover)
Laung-Terng Wang, Kwang-Ting (Tim) Cheng, Yao-Wen Chang
- 出版商: Morgan Kaufmann
- 出版日期: 2009-02-01
- 售價: $4,160
- 貴賓價: 9.5 折 $3,952
- 語言: 英文
- 頁數: 972
- 裝訂: Hardcover
- ISBN: 0123743648
- ISBN-13: 9780123743640
-
相關分類:
電子學 Eletronics、Computer-networks、電路學 Electric-circuits
立即出貨 (庫存 < 3)
買這商品的人也買了...
-
$3,650$3,468 -
$5,190$4,931 -
$1,200$1,176 -
$650$553 -
$8,550$8,123 -
$3,480$3,306 -
$1,166System-on-Chip Test Architectures (Hardcover)(庫存書況書側皆有霉斑,不介意者再下單)
-
$820$697 -
$620$527 -
$1,166Interactive Computer Graphics: A Top-Down Approach Using OpenGL, 5/e(美國版ISBN: 0321535863)
-
$880$862 -
$520$411 -
$750$638 -
$960$864 -
$1,190$1,166 -
$680$578 -
$1,372Advanced Digital Design with the Verilog HDL, 2/e (IE-Paperback)
-
$860$731 -
$900$855 -
$599$569 -
$564CPU 自製入門
-
$620$527 -
$980$774 -
$2,100$2,058 -
$680$530
相關主題
商品描述
<本書特色>
1 . Covers complete spectrum of the EDA flow, from ESL design modeling to logic/test synthesis, verification, physical design, and test...helps EDA newcomers to get "up-and-running" quickly;
2 . Comprehensive coverage of EDA concepts, principles, data structures, algorithms, and architectures...helps all readers improve their VLSI design competence;
3 . Latest advancements, not yet available in other books, including Test compression, ESL design modeling, Large-scale floorplanning, Placement, Routing, Synthesis of clock and power/ground networks...helps readers to design/develop testable chips or products;
4 . Includes industry best-practices wherever appropriate in most chapters...helps readers avoid costly mistakes
<內容簡介>
This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs to learn the concepts, principles, data structures, algorithms, and architectures of the EDA flow will benefit from this book.
<章節目錄>
Introduction
Fundamentals of CMOS Design
Design for Testability
Fundamentals of Algorithms
Electronic System-Level Design and Modeling
High-Level Synthesis
Logic Synthesis
Test Synthesis
Logic and Circuit Simulation
Functional Verification
Floorplanning
Placement
Global and Detailed Routing
Synthesis of Clock and Power/Ground Networks
Fault Simulation and Test Generation.
商品描述(中文翻譯)
本書特色:
1. 包含完整的EDA流程,從ESL設計建模到邏輯/測試合成、驗證、物理設計和測試...幫助EDA新手快速上手;
2. 全面涵蓋EDA概念、原則、數據結構、算法和架構...幫助所有讀者提高他們的VLSI設計能力;
3. 包含其他書籍尚未提及的最新進展,包括測試壓縮、ESL設計建模、大規模布局、佈局、路由、時鐘和電源/地網絡的合成...幫助讀者設計/開發可測試的芯片或產品;
4. 在大多數章節中包含行業最佳實踐...幫助讀者避免昂貴的錯誤。
內容簡介:
本書全面而廣泛地介紹了整個EDA流程。需要熟悉相關領域的EDA/VLSI從業人員和研究人員將會發現這是一本關於基本EDA概念、原則、數據結構、算法和架構的寶貴參考資料,用於設計、驗證和測試VLSI電路。任何需要學習EDA流程的概念、原則、數據結構、算法和架構的人都會從本書中受益。
章節目錄:
導論
CMOS設計基礎
可測試性設計
算法基礎
電子系統級設計和建模
高級合成
邏輯合成
測試合成
邏輯和電路模擬
功能驗證
布局規劃
佈局
全局和詳細路由
時鐘和電源/地網絡的合成
故障模擬和測試生成。