Electronic Design Automation: Synthesis, Verification, and Test (Hardcover)
暫譯: 電子設計自動化:綜合、驗證與測試 (精裝版)
Laung-Terng Wang, Kwang-Ting (Tim) Cheng, Yao-Wen Chang
- 出版商: Morgan Kaufmann
- 出版日期: 2009-02-01
- 售價: $3,980
- 貴賓價: 9.5 折 $3,781
- 語言: 英文
- 頁數: 972
- 裝訂: Hardcover
- ISBN: 0123743648
- ISBN-13: 9780123743640
-
相關分類:
VLSI
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相關主題
商品描述
<本書特色>
1 . Covers complete spectrum of the EDA flow, from ESL design modeling to logic/test synthesis, verification, physical design, and test...helps EDA newcomers to get "up-and-running" quickly;
2 . Comprehensive coverage of EDA concepts, principles, data structures, algorithms, and architectures...helps all readers improve their VLSI design competence;
3 . Latest advancements, not yet available in other books, including Test compression, ESL design modeling, Large-scale floorplanning, Placement, Routing, Synthesis of clock and power/ground networks...helps readers to design/develop testable chips or products;
4 . Includes industry best-practices wherever appropriate in most chapters...helps readers avoid costly mistakes
<內容簡介>
This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs to learn the concepts, principles, data structures, algorithms, and architectures of the EDA flow will benefit from this book.
<章節目錄>
Introduction
Fundamentals of CMOS Design
Design for Testability
Fundamentals of Algorithms
Electronic System-Level Design and Modeling
High-Level Synthesis
Logic Synthesis
Test Synthesis
Logic and Circuit Simulation
Functional Verification
Floorplanning
Placement
Global and Detailed Routing
Synthesis of Clock and Power/Ground Networks
Fault Simulation and Test Generation.
商品描述(中文翻譯)
<本書特色>
1 . 涵蓋完整的EDA流程,包括ESL設計建模、邏輯/測試綜合、驗證、物理設計和測試...幫助EDA新手快速上手;
2 . 全面涵蓋EDA概念、原則、數據結構、演算法和架構...幫助所有讀者提升其VLSI設計能力;
3 . 最新的進展,其他書籍尚未提供,包括測試壓縮、ESL設計建模、大規模平面規劃、佈局、路由、時鐘和電源/接地網路的綜合...幫助讀者設計/開發可測試的晶片或產品;
4 . 在大多數章節中包含行業最佳實踐...幫助讀者避免昂貴的錯誤
<內容簡介>
本書提供了整個EDA流程的廣泛和全面的涵蓋。需要在“相鄰”領域流利的EDA/VLSI從業者和研究人員將發現這是一本對VLSI電路設計、驗證和測試的基本EDA概念、原則、數據結構、演算法和架構的寶貴參考資料。任何需要學習EDA流程的概念、原則、數據結構、演算法和架構的人都將從本書中受益。
<章節目錄>
導言
CMOS設計基礎
可測試性設計
演算法基礎
電子系統級設計與建模
高階綜合
邏輯綜合
測試綜合
邏輯與電路模擬
功能驗證
平面規劃
佈局
全局與詳細路由
時鐘和電源/接地網路的綜合
故障模擬與測試生成。
