Digital System Design with VHDL, 2/e

Since the publication of the first edition, a new version of the VHDL standard has been agreed and analogue extensions to the language have also been adopted. The second edition of Digital System Design with VHDL includes additions in two important areas; sections on writing testbenches have been added to relevant chapters, and the addition of a new chapter on VHDL-AMS and mixed-signal modeling. The unique approach will be appreciated by undergraduates in Electronic Engineering and Computer Engineering in all years of their courses and by students undertaking postgraduate study. There is also a proven need from industry for graduates with knowledge of VHDL and the associated design tools and this book will be an asset to engineers who wish to continue their studies.

自從第一版出版以來，VHDL標準已經經過更新，並且還採用了對語言的類比擴展。《Digital System Design with VHDL》第二版在兩個重要領域進行了補充：在相關章節中增加了有關編寫測試環境的部分，並新增了一章關於VHDL-AMS和混合信號建模的內容。這種獨特的方法將受到電子工程和計算機工程本科生以及所有年級的研究生的讚賞，同時也滿足了業界對具備VHDL知識和相關設計工具的畢業生的需求。對於希望繼續學習的工程師來說，這本書也是一個寶貴的資源。