Engineering the Complex SOC : Fast, Flexible Design with Configurable Processors

Chris Rowen

  • 出版商: Prentice Hall
  • 出版日期: 2004-06-14
  • 售價: $3,115
  • 貴賓價: 9.5$2,959
  • 語言: 英文
  • 頁數: 496
  • 裝訂: Paperback
  • ISBN: 0131455370
  • ISBN-13: 9780131455375
  • 相關分類: 資訊科學軟體工程
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Table of Contents:

List of Figures.

Foreword by Clayton Christensen.

Foreword by John Hennessy.

Author’s Preface.

Acknowledgments.

1. The Case for a New SOC Design Methodology.

    The Age of Megagate SOCs.

    The Fundamental Trends of SOC Design.

    What’s Wrong with Today’s Approach to SOC Design?

    Preview: An Improved Design Methodology for SOC Design.

    Further Reading.

2. SOC Design Today.

    Hardware System Structure.

    Software Structure.

    Current SOC Design Flow.

    The Impact of Semiconductor Economics.

    Six Major Issues in SOC Design.

    Further Reading.

3. A New Look at SOC Design.

    Accelerating Processors for Traditional Software Tasks.

    Example: Tensilica Xtensa Processors for EEMBC Benchmarks.

    System Design with Multiple Processors.

    New Essentials of SOC Design Methodology.

    Addressing the Six Problems.

    Further Reading.

4. System-Level Design of Complex SOCs

    Complex SOC System Architecture Opportunities.

    Major Decisions in Processor-Centric SOC Organization.

    Communication Design = Software Mode + Hardware Interconnect.

    Hardware Interconnect Mechanisms.

    Performance-Driven Communication Design.

    The SOC Design Flow.

    Non-Processor Building Blocks in Complex SOC.

    Implications of Processor-Centric SOC Architecture.

    Further Reading.

5. Configurable Processors: A Software View.

    Processor Hardware/Software Cogeneration.

    The Process of Instruction Definition and Application Tuning.

    The Basics of Instruction Extension.

    The Programmer’s Model.

    Processor Performance Factors.

    Example: Tuning a Large Task.

    Memory-System Tuning.

    Long Instruction Words.

    Fully Automatic Instruction-Set Extension.

    Further Reading.

6. Configurable Processors: A Hardware View.

    Application Acceleration: A Common Problem.

    Introduction to Pipelines and Processors.

    Hardware Blocks to Processors.

    Moving from Hardwired Engines to Processors.

    Designing the Processor Interface.

    A Short Example: ATM Packet Segmentation and Reassembly.

    Novel Roles for Processors in Hardware Replacement.

    Processors, Hardware Implementation, and Verification Flow.

    Progress in Hardware Abstraction.

    Further Reading.

7. Advanced Topics in SOC Design.

    Pipelining for Processor Performance.

    Inside Processor Pipeline Stalls.

    Optimizing Processors to Match Hardware.

    Multiple Processor Debug and Trace.

    Issues in Memory Systems.

    Optimizing Power Dissipation in Extensible Processors.

    Essentials of TIE.

    Further Reading.

8. The Future of SOC Design: The Sea of Processors.

    Why Is Software Programmability So Central?

    Looking into the Future of SOC.

    Processor Scaling Model.

    Future Applications of Complex SOCs.

    The Future of the Complex SOC Design Process.

    The Future of the Industry.

    The Disruptive-Technology View.

    The Long View.

    Further Reading.

Index.

商品描述(中文翻譯)

目錄:
- 圖表清單
- Clayton Christensen 的前言
- John Hennessy 的前言
- 作者的前言
- 致謝辭
- 第一章:新的 SOC 設計方法論的案例
- Megagate SOC 的時代
- SOC 設計的基本趨勢
- 現今的 SOC 設計方法有何問題?
- 預覽:改進的 SOC 設計方法論
- 進一步閱讀資料
- 第二章:現今的 SOC 設計
- 硬體系統結構
- 軟體結構
- 目前的 SOC 設計流程
- 半導體經濟的影響
- SOC 設計中的六個主要問題
- 進一步閱讀資料
- 第三章:重新思考 SOC 設計
- 加速傳統軟體任務的處理器
- 以 Tensilica Xtensa 處理器為例的 EEMBC 基準測試
- 使用多個處理器的系統設計
- SOC 設計方法論的新要素
- 解決六個問題
- 進一步閱讀資料