Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools (Hardcover)

Joseph A. Fisher, Paolo Faraboschi, Cliff Young

  • 出版商: Morgan Kaufmann
  • 出版日期: 2004-12-01
  • 售價: $3,530
  • 貴賓價: 9.5$3,354
  • 語言: 英文
  • 頁數: 712
  • 裝訂: Hardcover
  • ISBN: 1558607668
  • ISBN-13: 9781558607668
  • 相關分類: 嵌入式系統Compiler
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商品描述

Description:

The fact that there are more embedded computers than general-purpose computers and that we are impacted by hundreds of them every day is no longer news. What is news is that their increasing performance requirements, complexity and capabilities demand a new approach to their design.

Fisher, Faraboschi, and Young describe a new age of embedded computing design, in which the processor is central, making the approach radically distinct from contemporary practices of embedded systems design. They demonstrate why it is essential to take a computing-centric and system-design approach to the traditional elements of nonprogrammable components, peripherals, interconnects and buses. These elements must be unified in a system design with high-performance processor architectures, microarchitectures and compilers, and with the compilation tools, debuggers and simulators needed for application development.

In this landmark text, the authors apply their expertise in highly interdisciplinary hardware/software development and VLIW processors to illustrate this change in embedded computing. VLIW architectures have long been a popular choice in embedded systems design, and while VLIW is a running theme throughout the book, embedded computing is the core topic. Embedded Computing examines both in a book filled with fact and opinion based on the authors many years of R&D experience.

 

Table of Contents:

Preface

Chapter 1: An Introduction to Embedded Processing
1.1 What is Embedded Computing?
1.2 Distinguishing Between Embedded and General Purpose Computing
1.3 Characterizing Embedded Computing
1.4 Embedded market structure
1.5 Further Reading
1.6 Exercises

Chapter 2: An Overview of VLIW and ILP
2.1 Semantics and parallelism
2.2 Design philosophies
2.3 Role of the compiler
2.4 VLIW in the embedded and DSP domains
2.5 Historical Perspective and Further Reading
2.6 Exercises

Chapter 3: An Overview of ISA Design
3.1 Overview: What to Hide
3.2 Basic VLIW design principles
3.3 Designing a VLIW ISA for Embedded Systems
3.4 Instruction-Set Encoding
3.5 VLIW Encoding
3.6 Encoding and Instruction-Set Extensions
3.7 Further Reading
3.8 Exercises

Chapter 4: Architectural Structures in ISA design
4.1 The Datapath
4.2 Registers and Clusters
4.3 Memory Architecture
4.4 Branch Architecture
4.5 Speculation and Predication
4.6 System Operations
4.7 Further Reading
4.8 Exercises

Chapter 5: Microarchitecture Design
5.1 Register File Design
5.2 Pipeline Design
5.3 VLIW Fetch, Sequencing and Decoding
5.4 The Datapath
5.5 Memory Architecture
5.6 Control Unit
5.7 Control Registers
5.8 Power Considerations
5.9 Further Reading
5.10 Exercises

Chapter 6: System Design and Simulation
6.1 System-on-Chip (SoC)
6.2 Processor Cores and System-On-Chip
6.3 Overview of Simulation
6.4 Simulating a VLIW architecture
6.5 System simulation
6.6 Validation and verification
6.7 Further Reading
6.8 Exercises

Chapter 7: Embedded Compiling and Toolchains
7.1 What is important in an ILP Compiler?
7.2 Embedded cross-development toolchains
7.3 Structure of an ILP compiler
7.4 Code Layout
7.5 Embedded-specific trade-offs for compilers
7.6 DSP-Specific Compiler Optimizations
7.7 Further Reading
7.8 Exercises

Chapter 8: Compiling for VLIWs and ILP
8.1 Profiling
8.2 Scheduling
8.3 Register allocation
8.4 Speculation and Predication
8.5 Instruction selection
8.6 Further Reading
8.7 Exercises

Chapter 9: The Run-time System
9.1 Exceptions, interrupts, and traps
9.2 Application Binary Interface considerations
9.3 Code Compression
9.4 Embedded Operating Systems
9.5 Multiprocessing and Multithreading
9.6 Further Reading
9.7 Exercises

Chapter 10: Application Design and Customization
10.1 Programming Language choices
10.2 Performance, Benchmarking and Tuning
10.3 Scalability and Customizability
10.4 Further Reading
10.5 Exercises

Chapter 11: Application Areas
11.1 Digital Printing and Imaging
11.2 Telecom applications
11.3 Other application areas
11.4 Further Reading
11.5 Exercises

Appendix A: The VEX System
Appendix B: Glossary
Appendix C: Bibliography

 

商品描述(中文翻譯)

描述:
嵌入式計算機的數量超過通用計算機並且我們每天都受到數百個嵌入式計算機的影響已經不再是新聞。新聞的是,它們不斷增加的性能需求、複雜性和功能要求一種對其設計的新方法。

Fisher、Faraboschi和Young描述了一個新的嵌入式計算設計時代,其中處理器是核心,使得這種方法與當代嵌入式系統設計實踐截然不同。他們證明了將計算為中心和系統設計方法應用於非可編程元件、外設、互連和匯流排等傳統元素是至關重要的。這些元素必須在高性能處理器架構、微架構和編譯器以及應用開發所需的編譯工具、調試器和模擬器的系統設計中統一起來。

在這本具有里程碑意義的著作中,作者們運用他們在高度跨學科的硬件/軟件開發和VLIW處理器方面的專業知識,以說明嵌入式計算的這一變革。VLIW架構一直是嵌入式系統設計中的一個熱門選擇,而VLIW是本書的一個主題,嵌入式計算是核心主題。《嵌入式計算》通過作者多年的研發經驗,充滿了事實和觀點。

目錄:
前言
第1章:嵌入式處理的介紹
1.1 什麼是嵌入式計算?
1.2 區分嵌入式和通用計算
1.3 嵌入式計算的特徵
1.4 嵌入式市場結構
1.5 進一步閱讀
1.6 練習

第2章:VLIW和ILP概述
2.1 語義和並行性
2.2 設計哲學
2.3 編譯器的作用
2.4 VLIW在嵌入式和DSP領域的應用
2.5 歷史背景和進一步閱讀
2.6 練習

第3章:ISA設計概述
3.1 概述:需要隱藏的內容
3.2 基本的VLIW設計原則
3.3 為嵌入式系統設計VLIW ISA
3.4 指令集編碼
3.5 VLIW編碼
3.6 編碼和指令集擴展
3.7 進一步閱讀
3.8 練習

第4章:ISA設計中的架構結構
4.1 數據路徑
4.2 寄存器和集群
4.3 存儲體結構
4.4 分支結構
4.5 推測和預測
4.6 系統操作
4.7 進一步閱讀
4.8 練習

第5章:微架構設計
5.1 寄存器文件設計
5.2 流水線設計
5.3 VLIW的提取、排序和解碼
5.4 數據路徑
5.5 存儲體結構
5.6 控制單元
5.7 控制寄存器
5.8 功耗考慮
5.9 進一步閱讀
5.10 練習

第6章:系統設計和模擬
6.1 系統單片機(SoC)
6.2 處理器核心和系統單片機
6.3 模擬概述
6.4 模擬VLIW架構
6.5 系統模擬
6.6 驗證和驗證
6.7 進一步閱讀
6.8 練習

第7章:嵌入式編譯和工具鏈
7.1 ILP編譯器中的重要因素
7.2 嵌入式交叉開發工具鏈
7.3 ILP編譯器的結構
7.4 代碼佈局
7.5