Formal Methods in Circuit Design

Victoria Stavridou

  • 出版商: Cambridge
  • 出版日期: 1993-08-27
  • 售價: $1,050
  • 貴賓價: 9.8$1,029
  • 語言: 英文
  • 頁數: 207
  • 裝訂: Hardcover
  • ISBN: 0521443369
  • ISBN-13: 9780521443364
  • 下單後立即進貨 (約5~7天)



The rapid growth in the VLSI market has meant that manufacturers are under pressure to deliver increasingly complex, reliable, and cost effective products. Dependability is becoming more and more important as computers become an integral part of safety critical systems. Formal techniques that have been used in software verification have migrated into the hardware domain, where for a variety of reasons, they have been in some respects more successful. This book analyzes the factors behind this success and formulates a set of criteria against which various approaches to hardware verification may be judged. This involves identifying the hardware requirements and the issues affecting the industrial use of formal methods. Dr. Stavridou also provides an overall perspective of the field, supplies case studies of various formalisms and finally describes an algebraic approach to the specification and verification of synchronous digital systems. This unique book can be used by students and teachers for courses in hardware verification, by hardware designers seeking an introduction to formal methods, and by researchers interested in algebraic specification.

Table of Contents

1. Introduction
2. Requirements
3. Case studies
4. The term rewriting approach
5. OBJ3 as a hardware specification language
6. Theorem proving with OBJ3
7. OBJ3 case studies
8. Conclusions