Performance Modeling For Computer Architects
- 出版商: Wiley-IEEE Computer Society Pr
- 出版日期: 1995-10-14
- 售價: $2,673
- 貴賓價: 9.5 折 $2,539
- 語言: 英文
- 頁數: 408
- 裝訂: Paperback
- ISBN: 0818670940
- ISBN-13: 9780818670947
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As computers become more complex, the number and complexity of the tasks facing the computer architect have increased. Computer performance often depends in complex way on the design parameters and intuition that must be supplemented by performance studies to enhance design productivity.
This book introduces computer architects to computer system performance models and shows how they are relatively simple, inexpensive to implement, and sufficiently accurate for most purposes. It discusses the development of performance models based on queuing theory and probability. The text also shows how they are used to provide quick approximate calculations to indicate basic performance tradeoffs and narrow the range of parameters to consider when determining system configurations. It illustrates how performance models can demonstrate how a memory system is to be configured, what the cache structure should be, and what incremental changes in cache size can have on the miss rate. A particularly deep knowledge of probability theory or any other mathematical field to understand the papers in this volume is not required.
Table of Contents:
Computer Performance Evaluation Methodology.
An Instruction Timing Model of CPU Performance.
On Parallel Processing Systems: Amdahl's Law Generalized and Some Results on Optimal Design.
The Nonuniform Distribution of Instruction-Level and Machine Parallelism and Its Effect on Performance.
Classification and Performance Evaluation of Instruction Buffering Techniques.
Characterization of Branch and Data Dependencies in Programs for Evaluating Pipeline Performance.
Branch Strategies: Modeling and Optimization.
Footprints in the Cache.
An Analytical Cache Model.
Modeling Live and Dead Lines in Cache Memory Systems.
Optimal Partitioning of Cache Memory.
An Accurate and Efficient Performance Analysis Technique for Multiprocessor Snooping Cache-Consistency Protocols.
Analyzing Multiprocessor Cache Behavior Through Data Reference Modeling.
Analysis of Multiprocessors with Private Cache Memories.
Vector Access Performance in Parallel Memories Using a Skewed Storage Scheme.
Performance of Processor-Memory Interconnections for Multiprocessors.
General Model for Memory Interference in Multiprocessors and Mean Value Analysis.
Equilibrium Point Analysis of Memory Interference in Multiprocessor Systems.
Scalar Memory References in Pipelined Multiprocessors: A Performance Study.
Performance Measurement and Modeling to Evaluate Various Effects on a Shared Memory Multiprocessor.
Optimal Design of Multilevel Storage Hierarchies.
Analysis of the Periodic Update Write Policy for Disk Cache.
Models of DASD Subsystems with Multiple Access Paths: A Throughput-Driven Approach.
Synchronized Disk Interleaving.
Asynchronous Disk Interleaving: Approximating Access Delays.
An Analytic Performance Model of Disk Arrays.
About the Author.