Digital Systems Design Using VHDL, 3/e (IE-Paperback)

Charles Roth, Jr. Lizy John

  • 出版商: Cengage Learning
  • 出版日期: 2017-01-03
  • 定價: $1,120
  • 售價: 9.5$1,064
  • 語言: 英文
  • 頁數: 592
  • 裝訂: Paperback
  • ISBN: 1305638921
  • ISBN-13: 9781305638921
  • 相關分類: ARM
  • 立即出貨 (庫存=1)

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商品描述

What's New
●COMPLETELY NEW MATERIAL DETAILS THE ARM INSTRUCTION SET AND DESIGN OF A SIMPLE ARM PROCESSOR. This brand new section in Chapter 9 provides students with a thorough understanding of this most widely used instruction set architecture.
●ARM AND MIPS DESIGNS ARE BOTH PRESENTED SO READERS CAN COMPARE THEM. Students are able to easily see the similarities of the designs despite differences in ISA when choosing behavioral design.
●A NEW CHAPTER EMPHASIZES VERIFICATION (CHAPTER 10). Student gain a strong understanding of various verification techniques with this timely content.
●NEW SECTION HIGHLIGHTS STATIC TIMING ANALYSIS. Students learn how to use this method to validate the design as part of the new chapter (10) on verification.
●NEW DESIGN EXAMPLES CLARIFY CONCEPTS FOR READERS. These design examples visually reinforce and clearly exemplify the skills and concepts that each chapter presents.
●NEW END-OF-CHAPTER PROBLEMS PROVIDE KEY OPPORTUNITIES FOR PRACTICE. These numerous new problems give students valuable hands-on practice in implementing the principles they are learning.

商品描述(中文翻譯)

新功能

●全新的材料詳細介紹了ARM指令集和簡單ARM處理器的設計。第9章的這一全新部分為學生提供了對這種最廣泛使用的指令集架構的深入理解。

●同時介紹了ARM和MIPS設計,讓讀者可以進行比較。學生在選擇行為設計時,可以輕鬆看到這些設計的相似之處,儘管ISA有所不同。

●新增章節強調驗證(第10章)。學生通過這一及時的內容,獲得對各種驗證技術的深入理解。

●新增章節突出了靜態時序分析。學生學習如何在驗證的新章節(第10章)中使用這種方法來驗證設計。

●新增設計示例為讀者澄清概念。這些設計示例以視覺方式強化並清晰地展示了每個章節所介紹的技能和概念。

●新增章節結束後的問題提供了重要的練習機會。這些眾多的新問題使學生有寶貴的實踐機會,可以實施他們正在學習的原則。

目錄大綱

1. REVIEW OF LOGIC DESIGN FUNDAMENTALS
2. INTRODUCTION TO VHDL
3. INTRODUCTION TO PROGRAMMABLE LOGIC DEVICES
4. DESIGN EXAMPLES
5. SM CHARTS AND MICROPROGRAMMING
6. DESIGNING WITH FIELD PROGRAMMABLE GATE ARRAYS
7. FLOATING-POINT ARITHMETIC
8. ADDITIONAL TOPICS IN VHDL
9. DESIGN OF A RISC MICROPROCESSOR
10. VERIFICATION OF DIGITAL SYSTEMS
11. HARDWARE TESTING AND DESIGN FOR TESTABILITY
12. ADDITIONAL DESIGN EXAMPLES (ONLINE)
Appendix A: VHDL Language Summary
Appendix B: IEEE Standard Libraries
Appendix C: TEXTIO Package
Appendix D: Projects

目錄大綱(中文翻譯)

1. 邏輯設計基礎回顧
2. VHDL介紹
3. 可程式邏輯裝置介紹
4. 設計範例
5. 狀態機圖和微程式設計
6. 使用現場可程式閘陣列進行設計
7. 浮點數運算
8. VHDL的其他主題
9. RISC微處理器設計
10. 數位系統驗證
11. 硬體測試和可測試性設計
12. 額外的設計範例(線上)
附錄A:VHDL語言摘要
附錄B:IEEE標準庫
附錄C:TEXTIO套件
附錄D:專案