Reuse Methodology Manual for System-On-A-Chip Designs, 3/e (Hardcover)

Michael Keating, Pierre Bricaud

  • 出版商: Kluwer Academic Publ
  • 出版日期: 2002-06-30
  • 售價: $1,050
  • 貴賓價: 9.8$1,029
  • 語言: 英文
  • 頁數: 292
  • 裝訂: Hardcover
  • ISBN: 1402071418
  • ISBN-13: 9781402071416
  • 立即出貨 (庫存=1)

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商品描述

Reuse Methodology Manual for System-on-a-Chip Designs, Third Edition outlines a set of best practices for creating reusable designs for use in an SoC design methodology. These practices are based on the authors' experience in developing reusable designs, as well as the experience of design teams in many companies around the world. Silicon and tool technologies move so quickly that many of the details of design-for-reuse will undoubtedly continue to evolve over time. But the fundamental aspects of the methodology described in this book have become widely adopted and are likely to form the foundation of chip design for some time to come.

Development methodology necessarily differs between system designers and processor designers, as well as between DSP developers and chipset developers. However, there is a common set of problems facing everyone who is designing complex chips.
In response to these problems, design teams have adopted a block-based design approach that emphasizes design reuse. Reusing macros (sometimes called "cores") that have already been designed and verified helps to address all of the problems above. However, in adopting reuse-based design, design teams have run into a significant problem. Reusing blocks that have not been explicitly designed for reuse has often provided little or no benefit to the team. The effort to integrate a pre-existing block into new designs can become prohibitively high, if the block does not provide the right views, the right documentation, and the right functionality.

From this experience, design teams have realized that reuse-based design requires an explicit methodology for developing reusable macros that are easy to integrate into SoC designs. This manual focuses on describing these techniques. Features of the Third Edition:

  • Up to date;
  • State of the art;
  • Reuse as a solution for circuit designers;
  • A chronicle of "best practices";
  • All chapters updated and revised;
  • Generic guidelines - non tool specific;
  • Emphasis on hard IP and physical design.

商品描述(中文翻譯)

《系統單晶片設計的重複使用方法手冊,第三版》概述了一套最佳實踐,用於在單晶片設計方法中創建可重複使用的設計。這些實踐基於作者在開發可重複使用設計方面的經驗,以及世界各地設計團隊的經驗。硅和工具技術發展迅速,因此設計重複使用的細節無疑會隨著時間的推移而不斷演變。但是,本書中描述的方法論的基本方面已被廣泛採用,並有可能成為未來一段時間內芯片設計的基礎。

系統設計師和處理器設計師之間的開發方法必然有所不同,DSP開發人員和芯片組開發人員之間也是如此。然而,設計複雜芯片的所有人都面臨著一組共同的問題。為了應對這些問題,設計團隊採用了基於塊的設計方法,強調設計重複使用。重複使用已經設計和驗證過的宏(有時稱為“核心”)有助於解決上述所有問題。然而,在採用基於重複使用的設計時,設計團隊遇到了一個重大問題。如果未明確為重複使用而設計的塊提供的視圖、文檔和功能不正確,將集成一個現有塊到新設計中的工作量可能變得非常高。

從這個經驗中,設計團隊意識到,基於重複使用的設計需要一個明確的方法論,用於開發易於集成到單晶片設計中的可重複使用的宏。本手冊重點介紹了這些技術。第三版的特點包括:

- 最新的;
- 最先進的;
- 重複使用作為電路設計師的解決方案;
- “最佳實踐”的編年史;
- 所有章節均已更新和修訂;
- 通用指南-非特定工具;
- 強調硬件IP和物理設計。