Copper Interconnect Technology
暫譯: 銅互連技術
Tapan Gupta
- 出版商: Springer
- 出版日期: 2009-08-07
- 售價: $6,630
- 貴賓價: 9.5 折 $6,299
- 語言: 英文
- 頁數: 423
- 裝訂: Hardcover
- ISBN: 1441900756
- ISBN-13: 9781441900753
-
相關分類:
微電子學 Microelectronics
海外代購書籍(需單獨結帳)
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相關主題
商品描述
Since overall circuit performance has depended primarily on transistor properties, previous efforts to enhance circuit and system speed were focused on transistors as well. During the last decade, however, the parasitic resistance, capacitance, and inductance associated with interconnections began to influence circuit performance and will be the primary factors in the evolution of nanoscale ULSI technology. Because metallic conductivity and resistance to electromigration of bulk copper (Cu) are better than aluminum, use of copper and low-k materials is now prevalent in the international microelectronics industry. As the feature size of the Cu-lines forming interconnects is scaled, resistivity of the lines increases. At the same time electromigration and stress-induced voids due to increased current density become significant reliability issues. Although copper/low-k technology has become fairly mature, there is no single book available on the promise and challenges of these next-generation technologies. In this book, a leader in the field describes advanced laser systems with lower radiation wavelengths, photolithography materials, and mathematical modeling approaches to address the challenges of Cu-interconnect technology.
商品描述(中文翻譯)
由於整體電路性能主要依賴於晶體管的特性,因此以往提升電路和系統速度的努力也集中在晶體管上。然而,在過去十年中,與互連相關的寄生電阻、电容和電感開始影響電路性能,並將成為納米尺度超大規模集成(ULSI)技術演進的主要因素。由於大塊銅(Cu)的金屬導電性和抗電遷移性優於鋁,因此在國際微電子產業中,銅和低介電常數(low-k)材料的使用已變得普遍。隨著形成互連的銅線特徵尺寸的縮小,這些銅線的電阻率會增加。同時,由於電流密度的增加,電遷移和應力誘導的空洞成為重要的可靠性問題。儘管銅/低-k技術已相當成熟,但目前尚無一本專門探討這些下一代技術的潛力和挑戰的書籍。在本書中,該領域的領導者描述了具有較低輻射波長的先進激光系統、光刻材料以及數學建模方法,以應對銅互連技術的挑戰。
