The Simple Art of Soc Design: Closing the Gap Between Rtl and ESL
Keating Synopsys Fellow, Michael
- 出版商: Springer
- 出版日期: 2014-10-01
- 售價: $4,410
- 貴賓價: 9.5 折 $4,190
- 語言: 英文
- 頁數: 234
- 裝訂: Quality Paper - also called trade paper
- ISBN: 1489998160
- ISBN-13: 9781489998163
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相關分類:
邏輯設計 Logic-design
海外代購書籍(需單獨結帳)
相關主題
商品描述
The Challenges of Complex Design; Simplifying RTL Design; Reducing Complexity in Control-Dominated Designs; Hierarchical State Machines; More on State Space; Verification; Reducing Complexity in Data Path Dominated Designs; Simplifying Interfaces; Complexity at the Chip Level; Raising Abstraction Above RTL; SystemVerilog Extensions; The Future of Design.
作者簡介
Mike Keating is a Synopsys Fellow. Over the last 12 years, he has been with Synopsys focusing on IP development methodology, hardware and software design quality and low power design. His current research focuses on high level design and the challenges of designing extremely complex systems. Mike received his BSEE and MSEE from Stanford University, and has over 25 years experience in ASIC and system design. He is co-author of the Reuse Methodology Manual and the Low Power Methodology Manual. In 2007, ISQED gave Mike the Quality Award for contributions to quality in electronic design.
