Pll Modulation and Mixed-Signal Calibration Techniques for Fmcw Radar
暫譯: FMCW 雷達的 Pll 調變與混合信號校準技術

Renukaswamy, Pratap Tumkur, Markulic, Nereo, Craninckx, Jan

Pll Modulation and Mixed-Signal Calibration Techniques for Fmcw Radar
  • 出版商: Springer
  • 出版日期: 2025-06-17
  • 售價: $4,130
  • 貴賓價: 9.5 折 $3,924
  • 語言: 英文
  • 頁數: 156
  • 裝訂: Quality Paper - also called trade paper
  • ISBN: 3031597753
  • ISBN-13: 9783031597756
  • 相關分類: 電路學 Electric-circuits

    • 海外代購書籍(需單獨結帳)

商品描述

This book covers analysis and design of PLL-based frequency modulators, used in the hearth of modern FMCW radars. The desired radar performance targets are translated into the modulator specifications first. The authors then focus on describing the optimal modulator architecture, with special care given to core building blocks of the system. The central analog building block described is a novel charge integrating-based chirp generator, which breaks limits of similar art in the field where performance (noise, area) is typically traded for power. The book then continues to describe power-efficient, mixed-signal background calibration engine implementation, which when applied in context of the presented system, ensures pristine linearity of the generated chirps. The detailed design guide shows how robust duty-cycling can be enabled, to ensure low-power consumption of the system, without compromise in radar performance. A complete overview of all circuit-level building blocks is provided, to ensure that readers can tackle every aspect of the system. Finally, the book covers description of a rigorous chirp-linearity and phase-noise performance characterization methodology, critical for evaluation of radar system performance metrics.

This book provides insightful design guidelines for DTC-based fractional-N PLL synthesizers and QDAC-based FMCW frequency modulators for both academic researchers and industry IC design engineers.

商品描述(中文翻譯)

本書涵蓋基於相位鎖定迴路（PLL）的頻率調變器的分析與設計，這些調變器用於現代頻率調變連續波（FMCW）雷達的核心。首先，將所需的雷達性能目標轉化為調變器的規格。然後，作者專注於描述最佳的調變器架構，特別關注系統的核心構建模塊。所描述的中央類比構建模塊是一種新型的基於電荷積分的啁啾生成器，突破了該領域類似技術的限制，通常在性能（噪聲、面積）與功耗之間進行權衡。本書接著描述了高效能的混合信號背景校準引擎實現，當應用於所呈現的系統時，確保生成的啁啾具有極佳的線性度。詳細的設計指南顯示如何啟用穩健的工作週期控制，以確保系統的低功耗，同時不妥協雷達性能。提供了所有電路級構建模塊的完整概述，以確保讀者能夠處理系統的各個方面。最後，本書涵蓋了一種嚴謹的啁啾線性度和相位噪聲性能特徵化方法的描述，這對於評估雷達系統性能指標至關重要。

本書為基於數位時鐘調整（DTC）的分數-N PLL 合成器和基於量化數位類比轉換器（QDAC）的 FMCW 頻率調變器提供了深入的設計指導，適用於學術研究人員和業界集成電路設計工程師。

作者簡介

Pratap Tumkur Renukaswamy received the M.Sc. degree in integrated systems and circuits design from the Carinthia University of Applied Sciences, Villach, Austria, in 2016, and the Ph.D. degree from Vrije Universiteit Brussel, Brussels, Belgium, in 2023. His PhD research was focused on frequency synthesis for FMCW radar application. He is currently a researcher at imec, Leuven, Belgium, working on mixed-signal circuits for frequency synthesis and analog-to-digital converters.

Nereo Markulic received the M.Sc. degree in electrical engineering from the University of Zagreb, Zagreb, Croatia, in 2012, and the Ph.D. degree summa cum laude from Vrije Universiteit Brussel, Brussels, Belgium, in 2018. His Ph.D. work was in collaboration with the Interuniversity Microelectronics Center (imec), Leuven, Belgium, on digital subsampling phase-locked loops (PLLs) and polar transmitters. He is currently a Research Scientist with imec, working on RF and mixed-signal circuits for radar applications and next generation connectivity. He has authored and coauthored publications and patents on PLLs and analog-to-digital converters and a book on frequency synthesis. Dr. Markulic currently serves on the Technical Program Committee for the Symposia on VLSI Technology and Circuits. He is a co-recipient of the ISSCC 2019 Lewis Winner Award for Outstanding Paper.

Jan Craninckx obtained his Ms. and Ph.D. degree in microelectronics summa cum laude from the ESAT-MICAS laboratories of the KULeuven in 1992 and 1997, respectively. His Ph.D. work was on the design of low-phase noise CMOS integrated VCOs and PLLs for frequency synthesis. From 1997 till 2002 he worked with Alcatel Microelectronics (later part of STMicroelectronics) as a senior RF engineer on the integration of RF transceivers for GSM, DECT, Bluetooth and WLAN. In 2002 he joined IMEC (Leuven, Belgium) as principal scientist working on RF, analog and mixed signal circuit design. He is currently IMECfellow. His research focuses on the design of RF transceiver front-ends in nanoscale CMOS, covering all aspects of RF, mmwave, analog and data converter design. Dr. Craninckx is an IEEE Fellow and has authored and co-authored more than 200 papers, book chapters, and patents. He is/was a regular member of the Technical Program Committee for several IEEE SSCS conferences, was the chair of the SSCS Benelux chapter (2006-2011), SSCS Distinguished Lecturer (2012-2013), and elected SSCS AdCom member (2017-2019). He received the received the ISSCC 2015 Jan Van Vessem Award and the ISSCC 2019 Lewis Winner Award. He was Associate Editor (2009-2016) and Editor-in-Chief (2016-2019) of the IEEE Journal of Solid-State Circuits.

作者簡介(中文翻譯)

Pratap Tumkur Renukaswamy於2016年獲得奧地利維拉赫卡林西亞應用科技大學的整合系統與電路設計碩士學位，並於2023年獲得比利時布魯塞爾自由大學的博士學位。他的博士研究專注於FMCW雷達應用的頻率合成。目前，他是比利時魯汶imec的研究員，專注於頻率合成和類比數位轉換器的混合信號電路。

Nereo Markulic於2012年獲得克羅埃西亞薩格勒布大學的電機工程碩士學位，並於2018年以優異成績獲得比利時布魯塞爾自由大學的博士學位。他的博士研究與比利時魯汶的跨大學微電子中心（imec）合作，專注於數位子取樣相位鎖定迴路（PLLs）和極性發射器。目前，他是imec的研究科學家，專注於雷達應用和下一代連接的RF和混合信號電路。他已發表和共同發表有關PLLs和類比數位轉換器的出版物和專利，以及一本關於頻率合成的書籍。Markulic博士目前擔任VLSI技術與電路研討會的技術程序委員會成員。他是2019年ISSCC Lewis Winner獎優秀論文的共同獲獎者。

Jan Craninckx於1992年和1997年分別在KULeuven的ESAT-MICAS實驗室獲得微電子學的碩士和博士學位，均以優異成績畢業。他的博士研究專注於低相位噪聲CMOS集成VCO和PLL的頻率合成設計。從1997年到2002年，他在阿爾卡特微電子（後來成為STMicroelectronics的一部分）擔任高級RF工程師，負責GSM、DECT、藍牙和WLAN的RF收發器整合。2002年，他加入比利時魯汶的IMEC，擔任首席科學家，專注於RF、類比和混合信號電路設計。目前，他是IMEC的研究員。他的研究重點是納米級CMOS中RF收發器前端的設計，涵蓋RF、毫米波、類比和數據轉換器設計的各個方面。Craninckx博士是IEEE Fellow，已發表和共同發表超過200篇論文、書籍章節和專利。他曾是多個IEEE SSCS會議的技術程序委員會的常規成員，擔任SSCS Benelux分會主席（2006-2011）、SSCS傑出講者（2012-2013），並當選SSCS AdCom成員（2017-2019）。他獲得了2015年ISSCC Jan Van Vessem獎和2019年ISSCC Lewis Winner獎。他曾擔任IEEE固態電路期刊的副編輯（2009-2016）和主編（2016-2019）。

類似商品