From Code to Chip: Open-Source Automated Analog Layout Design
暫譯: 從程式碼到晶片：開源自動化類比佈局設計
Ratschenberger, Jakob, Pretl, Harald
相關主題
商品描述
This book shows how the layout of an analog circuit can be automatically generated in a fully open-source way. Based on an exemplary design flow, it introduces and explains the necessary steps for transforming a SPICE netlist into a layout, which can be inspected by the open-source layout editor Magic VLSI. This is done by using the industry's first open-source process design kit SKY130. Furthermore, the implementation of the design flow in the programming language Python is available as open-source on GitHub.
In addition, this book:
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Describes in detail data structures necessary for implementing an analog layout design automation tool.
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Scopes and explains the entire design flow, starting from a netlist and ending in a layout.
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Provides succinct introductions to key topics, with references as needed for further technical depth.
商品描述(中文翻譯)
這本書展示了如何以完全開源的方式自動生成類比電路的佈局。基於一個範例設計流程，它介紹並解釋了將 SPICE 網路清單轉換為佈局所需的步驟，該佈局可以由開源佈局編輯器 Magic VLSI 進行檢查。這是通過使用業界首個開源製程設計套件 SKY130 來實現的。此外，該設計流程在程式語言 Python 中的實現也可在 GitHub 上以開源形式獲得。
此外，這本書：
- 詳細描述了實現類比佈局設計自動化工具所需的資料結構。
- 概述並解釋了整個設計流程，從網路清單開始，最終到達佈局。
- 提供關鍵主題的簡明介紹，並根據需要提供參考以深入技術內容。
作者簡介
Jakob Ratschenberger has received his Bachelor of Science (BSc) in the field of Electronics and Information Technology, from the Johannes Kepler University Linz, Austria, in 2022. He received the Dipl.-Ing. degree (with distinction) in Electronics and Information Technology from the Johannes Kepler University Linz, Austria, in 2024.
Harald Pretl received a Dipl.-Ing. degree (with distinction) in electrical engineering from the Graz University of Technology, Austria, in 1997, and the Dr. techn. degree from the Johannes Kepler University (JKU) in Linz, Austria, in 2001. From 2000 to 2011, he worked at Infineon Technologies as Director and Senior Principal Engineer, from 2011 to 2019 at Intel as Senior Principal Engineer and Chief RF Technologist, and from 2019 to 2022 at Apple, contributing to several generations of cellular RF transceivers. Since 2015, he has been a full professor, heading the Institute for Integrated Circuits (IIC) at JKU. He maintains the IIC-OSIC-TOOLS and is a member of the IEEE SSCS TC-OSE. In 2023, Harald founded PRETL consult GmbH, providing consulting services in the area of IC design.
作者簡介(中文翻譯)
雅各布·拉岑貝格（Jakob Ratschenberger）於2022年在奧地利林茲約翰·凱普勒大學（Johannes Kepler University Linz）獲得電子與資訊科技（Electronics and Information Technology）學士學位（Bachelor of Science, BSc）。他於2024年在同一所大學獲得電子與資訊科技的工程碩士學位（Dipl.-Ing.，優異成績）。
哈拉德·普雷特爾（Harald Pretl）於1997年在奧地利格拉茨科技大學（Graz University of Technology）獲得電機工程的工程碩士學位（Dipl.-Ing.，優異成績），並於2001年在奧地利林茲的約翰·凱普勒大學（JKU）獲得技術博士學位（Dr. techn.）。他於2000年至2011年在英飛凌科技（Infineon Technologies）擔任總監及高級首席工程師，2011年至2019年在英特爾（Intel）擔任高級首席工程師及首席射頻技術專家，2019年至2022年在蘋果（Apple）工作，為多代行動射頻收發器做出貢獻。自2015年以來，他擔任約翰·凱普勒大學集成電路研究所（Institute for Integrated Circuits, IIC）的正教授，並維護IIC-OSIC-TOOLS，還是IEEE SSCS TC-OSE的成員。2023年，哈拉德創立了PRETL consult GmbH，提供集成電路設計領域的諮詢服務。
