Through-Silicon Vias for 3D Integration (Hardcover)

John H. Lau

  • 出版商: McGraw-Hill Education
  • 出版日期: 2012-10-11
  • 售價: $2,300
  • 貴賓價: 9.8$2,254
  • 語言: 英文
  • 頁數: 512
  • 裝訂: Hardcover
  • ISBN: 0071785140
  • ISBN-13: 9780071785143

下單後立即進貨 (約5~7天)

買這商品的人也買了...

相關主題

商品描述

A comprehensive guide to TSV and other enabling technologies for 3D integration

Written by an expert with more than 30 years of experience in the electronics industry, Through-Silicon Vias for 3D Integration provides cutting-edge information on TSV, wafer thinning, thin-wafer handling, microbumping and assembly, and thermal management technologies. Applications to highperformance, high-density, low-power-consumption, wide-bandwidth, and small-form-factor electronic products are discussed.

This book offers a timely summary of progress in all aspects of this fascinating field for professionals active in 3D integration research and development, those who wish to master 3D integration problem-solving methods, and anyone in need of a low-power, wide-bandwidth design and high-yield manufacturing process for interconnect systems.

Coverage includes:

  • Nanotechnology and 3D integration for the semiconductor industry
  • TSV etching, dielectric-, barrier-, and seed-layer deposition, Cu plating, CMP, and Cu revealing
  • TSVs: mechanical, thermal, and electrical behaviors
  • Thin-wafer strength measurement
  • Wafer thinning and thin-wafer handling
  • Microbumping, assembly, and reliability
  • Microbump electromigration
  • Transient liquid-phase bonding: C2C, C2W, and W2W
  • 2.5D IC integration with interposers
  • 3D IC integration with interposers
  • Thermal management of 3D IC integration
  • 3D IC packaging