VLSI Test Principles and Architectures: Design for Testability (Hardcover)
Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen
- 出版商: Morgan Kaufmann
- 出版日期: 2006-06-01
- 售價: $2,940
- 貴賓價: 9.5 折 $2,793
- 語言: 英文
- 頁數: 808
- 裝訂: Hardcover
- ISBN: 0123705975
- ISBN-13: 9780123705976
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相關分類:
VLSI
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其他版本:
VLSI Test Principles and Architectures: Design for Testability (IE-Paperback)
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商品描述
Description
This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.
Table of Contents
Chapter 1 – Introduction Chapter 2 – Design for Testability Chapter 3 – Logic and Fault Simulation Chapter 4 – Test Generation Chapter 5 – Logic Built-In Self-Test Chapter 6 – Test Compression Chapter 7 – Logic Diagnosis Chapter 8 – Memory Testing and Built-In Self-Test Chapter 9 – Memory Diagnosis and Built-In Self-Repair Chapter 10 – Boundary Scan and Core-Based Testing Chapter 11 – Analog and Mixed-Signal Testing Chapter 12 – Test Technology Trends in the Nanometer Age