Digital Design with RTL Design, VHDL, and Verilog, 2/e (Hardcover)

Frank Vahid

  • 出版商: Wiley
  • 出版日期: 2010-03-08
  • 售價: $7,740
  • 貴賓價: 9.5$7,353
  • 語言: 英文
  • 頁數: 594
  • 裝訂: Hardcover
  • ISBN: 0470531088
  • ISBN-13: 9780470531082
  • 相關分類: Verilog
  • 下單後立即進貨 (約1~3週)




Extensive use of examples. Basic ones teach new concepts, and applications like pacemakers and cell phones demonstrate relevance. 
· HDL Neutral Synthesizable VHDL, Verilog, and SystemC coverage all appear in the last chapter, with subsections corresponding to earlier chapters, allowing early or late HDL introduction, without cluttering main concepts. 
· Appropriate emphasis on RTL. Topic coverage naturally leads to register-transfer-level (RTL) design, which is covered substantially. Comparisons between custom digital circuit and microprocessor implementations provide a modern perspective. 
· Modern coverage of optimization and tradeoffs. Tradeoffs are introduced alongside optimization, at all levels of abstraction (not just gate level), and cleanly distinguished from basic design. 
· Bottom-up description of field-programmable gate arrays (FPGAs). FPGA coverage shows precisely how circuits can be mapped to lookup tables and switch matrices using bitstreams. 

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HDL supplements now available as print-on-demand or digital ebook.


CHAPTER 1 Introduction.
CHAPTER 2 Combinational Logic Design.
CHAPTER 3 Sequential Logic Design: Controllers.
CHAPTER 4 Datapath Components.
CHAPTER 5 Register-Transfer Level (RTL) Design.
CHAPTER 6 Optimizations and Tradeoffs.
CHAPTER 7 Physical Implementation on ICs.
CHAPTER 8 Programmable Processors.
CHAPTER 9 Hardware Description Languages.
APPENDIX A Boolean Algebras.
APPENDIX B Additional Topics in Binary Number Systems.
APPENDIX C Extended RTL Design Example.