Digital Logic and Microprocessor Design with VHDL (Hardcover)

Enoch O. Hwang

  • 出版商: Thomson
  • 出版日期: 2005-02-18
  • 售價: $1,150
  • 貴賓價: 9.8$1,127
  • 語言: 英文
  • 頁數: 588
  • 裝訂: Hardcover
  • ISBN: 0534465935
  • ISBN-13: 9780534465933
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商品描述

Description:

This book will teach students how to design digital logic circuits, specifically combinational and sequential circuits. Students will learn how to put these two types of circuits together to form dedicated and general-purpose microprocessors. This book is unique in that it combines the use of logic principles and the building of individual components to create data paths and control units, and finally the building of real dedicated custom microprocessors and general-purpose microprocessors. After understanding the material in the book, students will be able to design simple microprocessors and implement them in real hardware.

 

Table of Contents:

Chapter 1. Designing Microprocessors
1.1 Overview of a Microprocessor
1.2 Design Abstraction Levels
1.3 Examples of a 2-to-1 Multiplexer
1.4 Introduction to VHDL
1.5 Synthesis
1.6 Going Forward
1.7 Summary Checklist
1.8 Problems

Chapter 2. Digital Circuits
2.1 Binary Numbers
2.2 Binary Switch
2.3 Basic Logic Operators and Logic Expressions
2.4 Truth Tables
2.5 Boolean Algebra and Boolean Function
2.6 Minterms and Maxterms
2.7 Canonical, Standard, and non-Standard Forms
2.8 Logic Gates and Circuit Diagrams
2.9 Example: Designing a Car Security System
2.10 VHDL for Digital Circuits
2.11 Summary Checklist
2.12 Problems

Chapter 3. Combinational Circuits
3.1 Analysis of Combinational Circuits
3.2 Synthesis of Combinational Circuits
3.3 * Technology Mapping
3.4 Minimization of Combinational Circuits
3.5 * Timing Hazards and Glitches
3.6 7-Segment Decoder Example
3.7 VHDL for Combinational Circuits
3.8 Summary Checklist
3.9 Problems

Chapter 4. Standard Combinational Components
4.1 Signal Naming Conventions
4.2 Adder
4.3 Two?s Complement Binary Numbers
4.4 Subtractor
4.5 Adder-Subtractor Combination
4.6 Arithmetic Logic Unit
4.7 Decoder
4.8 Encoder
4.9 Multiplexer
4.10 Tri-state Buffer
4.11 Comparator
4.12 Shifter-Rotator
4.13 Multiplier
4.14 Summary Checklist
4.15 Problems

Chapter 5. * Implementation Technologies
5.1 Physical Abstraction
5.2 Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET)
5.3 CMOS Logic
5.4 CMOS Circuits
5.5 Analysis of CMOS Circuits
5.6 Using ROMs to Implement a Function
5.7 Using PLAs to Implement a Function
5.8 Using PALs to Implement a Function
5.9 Complex Programmable Logic Device (CPLD)
5.10 Field-Programmable Gate Array (FPGA)
5.11 Summary Checklist
5.12 Problems

Chapter 6. Latches and Flip-Flops
6.1 Bistable Element
6.2 SR Latch
6.3 SR Latch with Enable
6.4 D Latch
6.5 D Latch with Enable
6.6 Clock
6.7 D Flip-Flop
6.8 D Flip-Flop with Enable
6.9 Asynchronous Inputs
6.10 Description of a Flip-Flop
6.11 Timing Issues
6.12 Example: Car Security System ? Version 2
6.13 VHDL for Latches and Flip-Flops
6.14 * Flip-Flop Types
6.15 Summary Checklist
6.16 Problems

Chapter 7. Sequential Circuits
7.1 Finite-State-Machine (FSM) Model
7.2 State Diagrams
7.3 Analysis of Sequential Circuits
7.4 Synthesis of Sequential Circuits
7.5 Unused State Encodings and the Encoding of States
7.6 Example: Car Security System ? Version 3
7.7 VHDL for Sequential Circuits
7.8 * Optimization for Sequential Circuits
7.9 Summary Checklist
7.10 Problems

Chapter 8. Standard Sequential Components
8.1 Registers
8.2 Shift Registers
8.3 Counters
8.4 Register Files
8.5 Static Random Access Memory
8.6 * Larger Memories
8.6.1 More Memory Locations
8.7 Summary Checklist
8.8 Problems

Chapter 9. Datapaths
9.1 General Datapath
9.2 Using a General Datapath
9.3 Timing Issues
9.4 A More Complex General Datapath
9.5 Dedicated Datapath
9.6 Designing Dedicated Datapaths
9.7 Using a Dedicated Datapath
9.8 VHDL for Datapaths
9.9 Summary Checklist
9.10 Problems

Chapter 10. Control Units
10.1 Constructing the Control Unit
10.2 Examples
10.3 Generating Status Signals
10.4 Timing Issues
10.5 Standalone Controllers
10.6 * ASM Charts and State Action Tables
10.7 VHDL for Control Units
10.8 Summary Checklist
10.9 Problems

Chapter 11. Dedicated Microprocessors
11.1 Manual Construction of a Dedicated Microprocessor
11.2 Examples
11.3 VHDL for Dedicated Microprocessors
11.4 Summary Checklist
11.5 Problems

Chapter 12. General-Purpose Microprocessors
12.1 Overview of the CPU Design
12.2 The EC-1 General-Purpose Microprocessor
12.3 The EC-2 General-Purpose Microprocessor
12.4 VHDL for General-Purpose Microprocessors
12.5 Summary Checklist
12.6 Problems

Appendix A. Schematic Entry Tutorial 1
A.1 Getting Started
A.2 Using the Graphic Editor
A.3 Specifying the Top-Level File and Project
A.4 Synthesis for Functional Simulation
A.5 Circuit Simulation
A.6 Creating and Using the Logic Symbol

Appendix B. VHDL Entry Tutorial 2
B.1 Getting Started
B.2 Synthesis for Functional Simulation
B.3 Circuit Simulation

Appendix C. UP2 Programming Tutorial 3
C.1 Getting Started
C.2 Synthesis for Programming the PLD
C.3 Circuit Simulation
C.4 Using the Floorplan Editor
C.5 Fitting the Netlist and Pins to the PLD
C.6 H ardware Setup
C.7 Programming the PLD
C.8 Testing the Hardware
C.9 MAX7000S EPM7128SLC84-7 Summary
C.10 FLEX10K EPF10K70RC240-4 Summary

Appendix D. VHDL Summary
D.1 Basic Language Elements
D.2 Dataflow Model Concurrent Statements
D.3 Behavioral Model Sequential Statements
D.4 Structural Model Statements
D.5 Conversion Routines

商品描述(中文翻譯)

描述:
本書將教授學生如何設計數位邏輯電路,特別是組合和時序電路。學生將學習如何將這兩種類型的電路結合在一起,形成專用和通用微處理器。本書的獨特之處在於結合邏輯原理的使用和單獨組件的構建,以創建數據路徑和控制單元,最終構建真實的專用定制微處理器和通用微處理器。在理解本書中的材料後,學生將能夠設計簡單的微處理器並在實際硬件中實現它們。

目錄:
第1章 設計微處理器
1.1 微處理器概述
1.2 設計抽象層次
1.3 2對1多路復用器示例
1.4 VHDL簡介
1.5 合成
1.6 未來發展
1.7 摘要檢查清單
1.8 問題

第2章 數位電路
2.1 二進制數字
2.2 二進制開關
2.3 基本邏輯運算符和邏輯表達式
2.4 真值表
2.5 布爾代數和布爾函數
2.6 最小項和最大項
2.7 正規、標準和非標準形式
2.8 邏輯閘和電路圖
2.9 示例:設計汽車安全系統
2.10 用於數位電路的VHDL
2.11 摘要檢查清單
2.12 問題

第3章 組合電路
3.1 組合電路分析
3.2 組合電路合成
3.3 *技術映射
3.4 組合電路最小化
3.5 *時序危害和毛刺
3.6 7段解碼器示例
3.7 用於組合電路的VHDL
3.8 摘要檢查清單
3.9 問題

第4章 標準組合元件
4.1 信號命名慣例
4.2 加法器
4.3 二補數二進制數字
4.4 減法器
4.5 加減器組合
4.6 算術邏輯單元
4.7 解碼器
4.8 編碼器
4.9 多路復用器
4.10 三態緩衝器
4.11 比較器
4.12 移位器-旋轉器
4.13 乘法器
4.14 摘要檢查清單
4.15 問題

第5章 *實現技術
5.1 物理抽象
5.2 金屬氧化物半導體場效應晶體管(MOSFET)
5.3 CMOS邏輯
5.4 CMOS電路
5.5 CMOS電路分析
5.6 使用ROM實現函數
5.7 使用PLA實現函數
5.8 使用PAL實現函數
5.9 複雜可編程邏輯器件(CPLD)
5.10 可編程閘陣列(FPGA)
5.11 摘要檢查清單
5.12 問題

第6章 閂和觸發器
6.1 雙穩態元件
6.2 SR閂
6.3 帶使能的SR閂
6.4 D閂
6.5 帶使能的D閂
6.6 時鐘
6.7 D觸發器
6.8 帶使能的D觸發器
6.9 異步輸入
6.10 觸發器描述
6.11 時序問題
6.12 示例:汽車安全系統-第2版
6.13 用於閂和觸發器的VHDL
6.14 *觸發器類型
6.15 摘要檢查清單
6.16 問題

第7章 時序電路
7.1 有限狀態機(FSM)模型
7.2 狀態圖
7.3 時序電路分析
7.4 時序電路合成
7.5 未使用的狀態編碼和