Digital System Designs and Practices: Using Verilog HDL and FPGAs (Hardcover)
暫譯: 數位系統設計與實務：使用 Verilog HDL 與 FPGA (精裝版)

<內容簡介>

System-on-a-chip (SoC) has become an essential technique to lower product costs and maximize power efficiency, particularly as the mobility and size requirements of electronics continues to grow. It has therefore become increasingly important for electrical engineers to develop a strong understanding of the key stages of hardware description language (HDL) design flow based on cell-based libraries or field-programmable gate array (FPGA) devices. Honed and revised through years of classroom use, Lin focuses on developing, verifying, and synthesizing designs of practical digital systems using the most widely used hardware description Language: Verilog HDL.

<章節目錄>

Chapter 1: Introduction.
Chapter 2: Structural Modeling.

Chapter 3: Dataflow Modeling.

Chapter 4: Behavioral Modeling.

Chapter 5: Tasks, Functions, and UDPs.

Chapter 6: Hierarchical Structural Modeling.

Chapter 7: Advanced Modeling Techniques.

Chapter 8: Combinational Logic Modules.

Chapter 9: Sequential Logic Modules.

Chapter 10: Design Options of Digital Systems.

Chapter 11: System Design Methodology.

Chapter 12: Synthesis.

Chapter 13: Verification.

Chapter 14: Arithmetic Modules.

Chapter 15: Design Examples.

Chapter 16: Design for Testability.