Hardware Description Language Demystified: Explore Digital System Design Using Verilog HDL and VLSI Design Tools (English Edition)
暫譯: 硬體描述語言揭秘:使用 Verilog HDL 和 VLSI 設計工具探索數位系統設計(英文版)
Sarma, Rajkumar, Bhargava, Cherry
商品描述
Get familiar and work with the basic and advanced Modeling types in Verilog HDL
Key FeaturesLearn about the step-wise process to use Verilog design tools such as Xilinx, Vivado, Cadence NC-SIM Explore the various types of HDL and its need Learn Verilog HDL modeling types using examples Learn advanced concept such as UDP, Switch level modeling Learn about FPGA based prototyping of the digital system
Description
Hardware Description Language (HDL) allows analysis and simulation of digital logic and circuits. The HDL is an integral part of the EDA (electronic design automation) tool for PLDs, microprocessors, and ASICs. So, HDL is used to describe a Digital System. The combinational and sequential logic circuits can be described easily using HDL. Verilog HDL, standardized as IEEE 1364, is a hardware description language used to model electronic systems.
This book is a comprehensive guide about the digital system and its design using various VLSI design tools as well as Verilog HDL. The step-wise procedure to use various VLSI tools such as Xilinx, Vivado, Cadence NC-SIM, is covered in this book. It also explains the advanced concept such as User Define Primitives (UDP), switch level modeling, reconfigurable computing, etc. Finally, this book ends with FPGA based prototyping of the digital system.
By the end of this book, you will understand everything related to digital system design.
What will you learn
Implement Adder, Subtractor, Adder-Cum-Subtractor using Verilog HDL Explore the various Modeling styles in Verilog HDL Implement Switch level modeling using Verilog HDL Get familiar with advanced modeling techniques in Verilog HDL Get to know more about FPGA based prototyping using Verilog HDL
Who this book is for
Anyone interested in Electronics and VLSI design and want to learn Digital System Design with Verilog HDL will find this book useful. IC developers can also use this book as a quick reference for Verilog HDL fundamentals & features. Table of Contents
1. An Introduction to VLSI Design Tools
2. Need of Hardware Description Language (HDL)
3. Logic Gate Implementation in Verilog HDL
4. Adder-Subtractor Implementation Using Verilog HDL
5. Multiplexer/Demultiplexer Implementation in Verilog HDL
6. Encoder/Decoder Implementation Using Verilog HDL
7. Magnitude Comparator Implementation Using Verilog HDL
8. Flip-Flop Implementation Using Verilog HDL
9. Shift Registers Implementation Using Verilog HDL
10. Counter Implementation Using Verilog HDL
11. Shift Register Counter Implementation Using Verilog HDL
12. Advanced Modeling Techniques
13. Switch Level Modeling
14. FPGA Prototyping in Verilog HDL
About the Author
Dr. Cherry Bhargava is working as an associate professor and head, VLSI domain, School of Electrical and Electronics Engineering at Lovely Professional University, Punjab, India. She has more than 14 years of teaching and research experience. She is Ph.D. (ECE), IKGPTU, M.Tech (VLSI Design & CAD) Thapar University and B.Tech (Electronics and Instrumentation) from Kurukshetra University. She is GATE qualified with All India Rank 428.
She has authored about 50 technical research papers in SCI, Scopus indexed quality journals, and national/international conferences.
Dr. Rajkumar Sarma received his B.E. in Electronics and Communications Engineering from Vinayaka Mission's University, Salem, India & M.Tech degree from Lovely Professional University, Phagwara, Punjab and currently pursuing Ph.D. from Lovely Professional University, Phagwara, Punjab.
Key Features
Description
Hardware Description Language (HDL) allows analysis and simulation of digital logic and circuits. The HDL is an integral part of the EDA (electronic design automation) tool for PLDs, microprocessors, and ASICs. So, HDL is used to describe a Digital System. The combinational and sequential logic circuits can be described easily using HDL. Verilog HDL, standardized as IEEE 1364, is a hardware description language used to model electronic systems.
This book is a comprehensive guide about the digital system and its design using various VLSI design tools as well as Verilog HDL. The step-wise procedure to use various VLSI tools such as Xilinx, Vivado, Cadence NC-SIM, is covered in this book. It also explains the advanced concept such as User Define Primitives (UDP), switch level modeling, reconfigurable computing, etc. Finally, this book ends with FPGA based prototyping of the digital system.
By the end of this book, you will understand everything related to digital system design.
What will you learn
Who this book is for
Anyone interested in Electronics and VLSI design and want to learn Digital System Design with Verilog HDL will find this book useful. IC developers can also use this book as a quick reference for Verilog HDL fundamentals & features. Table of Contents
1. An Introduction to VLSI Design Tools
2. Need of Hardware Description Language (HDL)
3. Logic Gate Implementation in Verilog HDL
4. Adder-Subtractor Implementation Using Verilog HDL
5. Multiplexer/Demultiplexer Implementation in Verilog HDL
6. Encoder/Decoder Implementation Using Verilog HDL
7. Magnitude Comparator Implementation Using Verilog HDL
8. Flip-Flop Implementation Using Verilog HDL
9. Shift Registers Implementation Using Verilog HDL
10. Counter Implementation Using Verilog HDL
11. Shift Register Counter Implementation Using Verilog HDL
12. Advanced Modeling Techniques
13. Switch Level Modeling
14. FPGA Prototyping in Verilog HDL
About the Author
Dr. Cherry Bhargava is working as an associate professor and head, VLSI domain, School of Electrical and Electronics Engineering at Lovely Professional University, Punjab, India. She has more than 14 years of teaching and research experience. She is Ph.D. (ECE), IKGPTU, M.Tech (VLSI Design & CAD) Thapar University and B.Tech (Electronics and Instrumentation) from Kurukshetra University. She is GATE qualified with All India Rank 428.
She has authored about 50 technical research papers in SCI, Scopus indexed quality journals, and national/international conferences.
Dr. Rajkumar Sarma received his B.E. in Electronics and Communications Engineering from Vinayaka Mission's University, Salem, India & M.Tech degree from Lovely Professional University, Phagwara, Punjab and currently pursuing Ph.D. from Lovely Professional University, Phagwara, Punjab.
商品描述(中文翻譯)
熟悉並使用 Verilog HDL 中的基本與進階建模類型
主要特點
描述
硬體描述語言(HDL)允許對數位邏輯和電路進行分析和模擬。HDL 是電子設計自動化(EDA)工具中對可編程邏輯裝置(PLDs)、微處理器和應用特定集成電路(ASICs)不可或缺的一部分。因此,HDL 用於描述數位系統。組合邏輯和時序邏輯電路可以輕鬆地使用 HDL 進行描述。Verilog HDL,標準化為 IEEE 1364,是一種用於建模電子系統的硬體描述語言。
本書是關於數位系統及其設計的綜合指南,使用各種 VLSI 設計工具以及 Verilog HDL。本書涵蓋了使用各種 VLSI 工具(如 Xilinx、Vivado、Cadence NC-SIM)的逐步程序。它還解釋了進階概念,如用戶定義原語(UDP)、開關級建模、可重構計算等。最後,本書以基於 FPGA 的數位系統原型設計作結。
在本書結束時,您將了解與數位系統設計相關的所有內容。
您將學到什麼
本書適合誰
任何對電子學和 VLSI 設計感興趣並希望學習使用 Verilog HDL 進行數位系統設計的人都會發現本書有用。IC 開發人員也可以將本書作為 Verilog HDL 基礎與特性的快速參考。目錄
1. VLSI 設計工具簡介
2. 硬體描述語言(HDL)的需求
3. Verilog HDL 中的邏輯閘實現
4. 使用 Verilog HDL 實現加減法器
5. Verilog HDL 中的多路複用器/解複用器實現
6. 使用 Verilog HDL 實現編碼器/解碼器
7. 使用 Verilog HDL 實現大小比較器
8. 使用 Verilog HDL 實現觸發器
9. 使用 Verilog HDL 實現移位暫存器
10. 使用 Verilog HDL 實現計數器
11. 使用 Verilog HDL 實現移位暫存器計數器
12. 進階建模技術
13. 開關級建模
14. Verilog HDL 中的 FPGA 原型設計
關於作者
Cherry Bhargava 博士 擔任印度旁遮普州 Lovely Professional University 電氣與電子工程學院 VLSI 領域的副教授及負責人。她擁有超過 14 年的教學和研究經驗。她擁有 IKGPTU 的博士學位(電子與通信工程)、Thapar 大學的碩士學位(VLSI 設計與 CAD)以及 Kurukshetra 大學的學士學位(電子與儀器)。她在 GATE 考試中獲得全國排名 428。
她在 SCI、Scopus 索引的高品質期刊及國內/國際會議上發表了約 50 篇技術研究論文。
Rajkumar Sarma 博士 於印度 Salem 的 Vinayaka Mission's University 獲得電子與通信工程學士學位,並在 Lovely Professional University 獲得碩士學位,目前正在 Lovely Professional University 進行博士研究。