Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture Level (Hardcover)

Razavi, Behzad

  • 出版商: Cambridge
  • 出版日期: 2020-03-12
  • 售價: $1,850
  • 貴賓價: 9.8$1,813
  • 語言: 英文
  • 頁數: 506
  • 裝訂: Hardcover - also called cloth, retail trade, or trade
  • ISBN: 1108494544
  • ISBN-13: 9781108494540
  • 相關分類: CMOS

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Using a modern, pedagogical approach, this textbook gives students and engineers a comprehensive and rigorous knowledge of CMOS phase-locked loop (PLL) design for a wide range of applications. It features intuitive presentation of theoretical concepts, built up gradually from their simplest form to more practical systems; broad coverage of key topics, including oscillators, phase noise, analog PLLs, digital PLLs, RF synthesizers, delay-locked loops, clock and data recovery circuits, and frequency dividers; tutorial chapters on high-performance oscillator design, covering fundamentals to advanced topologies; and extensive use of circuit simulations to teach design mentality, highlight design flaws, and connect theory with practice. Including over 200 thought-provoking examples highlighting best practices and common pitfalls, 250 end-of-chapter homework problems to test and enhance the readers' understanding, and solutions and lecture slides for instructors, this is the perfect text for senior undergraduate and graduate-level students and professional engineers who want an in-depth understanding of PLL design.