Design of CMOS Phase-Locked Loops: From Circuit Level to Architecture Level (Hardcover)

Razavi, Behzad

  • 出版商: Cambridge
  • 出版日期: 2020-01-30
  • 售價: $1,960
  • 貴賓價: 9.8$1,921
  • 語言: 英文
  • 頁數: 506
  • 裝訂: Hardcover - also called cloth, retail trade, or trade
  • ISBN: 1108494544
  • ISBN-13: 9781108494540
  • 相關分類: CMOS
  • 銷售排行: 👍 2020 年度 英文書 銷售排行 第 20 名

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商品描述

Using a modern, pedagogical approach, this textbook gives students and engineers a comprehensive and rigorous knowledge of CMOS phase-locked loop (PLL) design for a wide range of applications. It features intuitive presentation of theoretical concepts, built up gradually from their simplest form to more practical systems; broad coverage of key topics, including oscillators, phase noise, analog PLLs, digital PLLs, RF synthesizers, delay-locked loops, clock and data recovery circuits, and frequency dividers; tutorial chapters on high-performance oscillator design, covering fundamentals to advanced topologies; and extensive use of circuit simulations to teach design mentality, highlight design flaws, and connect theory with practice. Including over 200 thought-provoking examples highlighting best practices and common pitfalls, 250 end-of-chapter homework problems to test and enhance the readers' understanding, and solutions and lecture slides for instructors, this is the perfect text for senior undergraduate and graduate-level students and professional engineers who want an in-depth understanding of PLL design.

商品描述(中文翻譯)

本教科書以現代、教學導向的方式,為學生和工程師提供了關於CMOS相位鎖定迴路(PLL)設計的全面且嚴謹的知識,適用於各種應用。它以直觀的方式呈現理論概念,從最簡單的形式逐漸建立到更實用的系統;廣泛涵蓋關鍵主題,包括振盪器、相位噪音、類比PLL、數字PLL、射頻合成器、延遲鎖定迴路、時鐘和數據恢復電路以及頻率分頻器;教學性章節介紹高性能振盪器設計,從基礎到高級拓撲;並廣泛使用電路模擬來教授設計思維,突顯設計缺陷,並將理論與實踐相結合。本書包含超過200個引人深思的例子,突出最佳實踐和常見陷阱,250個章末作業問題以測試和提升讀者的理解能力,以及提供解答和講義幻燈片給教師使用,是高年級本科生、研究生和專業工程師理解PLL設計的完美教材。