Advances in Embedded and Fan-Out Wafer Level Packaging Technologies

Beth Keser (Editor), Steffen Kroehnert (Editor)

  • 出版商: Wiley
  • 出版日期: 2019-02-12
  • 定價: $4,400
  • 售價: 9.5$4,180
  • 語言: 英文
  • 頁數: 528
  • 裝訂: Hardcover
  • ISBN: 1119314135
  • ISBN-13: 9781119314134
  • 相關分類: 嵌入式系統
  • 立即出貨 (庫存 < 3)

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商品描述

Examines the advantages of Embedded and FO-WLP technologies, potential application spaces, package structures available in the industry, process flows, and material challenges

 

Embedded and fan-out wafer level packaging (FO-WLP) technologies have been developed across the industry over the past 15 years and have been in high volume manufacturing for nearly a decade. This book covers the advances that have been made in this new packaging technology and discusses the many benefits it provides to the electronic packaging industry and supply chain. It provides a compact overview of the major types of technologies offered in this field, on what is available, how it  is processed, what is driving its development, and the pros and cons.

 

Filled with contributions from some of the field’s leading experts, Advances in Embedded and Fan-Out Wafer Level Packaging Technologies begins with a look at the history of the technology. It then goes on to examine the biggest technology and marketing trends. Other sections are dedicated to chip-first FO-WLP, chip-last FO-WLP, embedded die packaging, materials challenges, equipment challenges, and resulting technology fusions.

 

  • Discusses specific company standards and their development results
  • Content relates to practice as well as to contemporary and future challenges in electronics system integration and packaging

 

Advances in Embedded and Fan-Out Wafer Level Packaging Technologies will appeal to microelectronic packaging engineers, managers, and decision makers working in OEMs, IDMs, IFMs, OSATs, silicon foundries, materials suppliers, equipment suppliers, and CAD tool suppliers. It is also an excellent book for professors and graduate students working in microelectronic packaging research.

商品描述(中文翻譯)

本書探討了嵌入式和FO-WLP(fan-out wafer level packaging)技術的優勢、潛在的應用領域、行業中可用的封裝結構、製程流程和材料挑戰。

嵌入式和FO-WLP技術在過去15年間在整個行業中得到了發展,並且在近十年中已經進入了大規模生產。本書介紹了這種新型封裝技術所取得的進展,並討論了它為電子封裝行業和供應鏈帶來的許多好處。它簡要概述了該領域提供的主要技術類型,以及可用的技術、處理方式、推動其發展的因素以及優缺點。

本書由該領域的一些領先專家共同貢獻,首先回顧了該技術的歷史,然後探討了最大的技術和市場趨勢。其他章節則專門討論了先芯片後FO-WLP、後芯片後FO-WLP、嵌入式芯片封裝、材料挑戰、設備挑戰以及相應的技術融合。

本書還討論了特定公司的標準及其開發結果,內容涉及實踐以及電子系統集成和封裝領域的當代和未來挑戰。

《嵌入式和FO-WLP技術的進展》將吸引微電子封裝工程師、經理和決策者,他們在OEM、IDM、IFM、OSAT、矽晶圓廠、材料供應商、設備供應商和CAD工具供應商等領域工作。對於從事微電子封裝研究的教授和研究生來說,這本書也是一本很好的參考書。