The Verilog Hardware Description Language, 5/e (Hardcover)

Donald E. Thomas, Philip R. Moorby

  • 出版商: Kluwer Academic Publ
  • 出版日期: 2002-06-30
  • 售價: $960
  • 貴賓價: 9.8$941
  • 語言: 英文
  • 頁數: 382
  • 裝訂: Hardcover
  • ISBN: 1402070896
  • ISBN-13: 9781402070891
  • 相關分類: Verilog
  • 立即出貨 (庫存=1)



Thomas & Moorby's The Verilog® Hardware Description Language has become the standard reference text for Verilog. This edition presents the new IEEE 1364-2001 standard of the language. The examples have all been updated to illustrate the new features of the language. A cross referenced guide to the new and old features is provided. Thus, designers already familiar with Verilog can quickly learn the new features. Newcomers to the language can use it as a guide for reading "old" specifications.

The Verilog® Hardware Description Language, Fifth Edition, is a valuable resource for engineers and students interested in describing, simulating, and synthesizing digital systems; the extensive number of simulatable examples and wide range of representation styles covered insure its quick use in design.

The book is also ready for use in university courses, having been used for introductory logic design and simulation through advanced VLSI design courses. An appendix with tutorial help and a work-along style is keyed into the introduction for new students. Material supporting a computer-aided design course on the inner working of simulators is also included.


From the Old to the New. Acknowledgments.

1. Verilog – A Tutorial Introduction.

2. Logic Synthesis.

3. Behavioral Modeling.

4. Concurrent Processes.

5. Module Hierarchy. 

6. Logic Level Modeling.

7. Cycle-Accurate Specification.

8. Advanced Timing.

9. User-Defined Primitives.

10. Switch Level Modeling.

11. Projects. Appendix A: Tutorial Questions and Discussion. Appendix B: Lexical Conventions. Appendix C: Verilog Operators. Appendix D: Verilog Gate Types. Appendix E: Registers, Memories, Integers, and Time 328. Appendix F: System Tasks and Functions. Appendix G: Formal Syntax Definition. Index.


Thomas & Moorby的《The Verilog® Hardware Description Language》已成為Verilog的標準參考書。本版介紹了語言的新標準IEEE 1364-2001。所有示例都已更新,以展示語言的新功能。提供了新舊功能的交叉參考指南。因此,已熟悉Verilog的設計師可以快速學習新功能。對於初學者來說,可以將其用作閱讀“舊”規範的指南。

《The Verilog® Hardware Description Language, Fifth Edition》是工程師和對描述、模擬和合成數字系統感興趣的學生的寶貴資源;大量可模擬的示例和涵蓋廣泛的表示風格確保了其在設計中的快速使用。




1. Verilog - 教程介紹。

2. 邏輯合成。

3. 行為建模。

4. 並行處理。

5. 模塊層次結構。

6. 邏輯級建模。

7. 循環準確規範。

8. 高級時序。

9. 用戶自定義原始。

10. 開關級建模。

11. 項目。附錄A:教程問題和討論。附錄B:詞法約定。附錄C:Verilog運算符。附錄D:Verilog閘類型。附錄E:寄存器、記憶體、整數和時間328。附錄F:系統任務和函數。附錄G:正式語法定義。索引。