See MIPS Run
- 出版商: Morgan Kaufmann
- 出版日期: 1999-02-23
- 售價: $2,538
- 貴賓價: 9.5 折 $2,411
- 語言: 英文
- 頁數: 512
- 裝訂: Paperback
- ISBN: 1558604103
- ISBN-13: 9781558604100
Order This Book | Authors | Contents | Related Titles
"I found See MIPS Run to be a great mixture of genealogy, theory, and good advice regarding MIPS processors. I can sincerely say that anyone developing code for MIPS processors should have a copy on their bookshelf."
--John Tinsman, Swiss Federal Institute of Technology
"This book is a must-read for all programmers building embedded systems with 64-bit MIPS processors."
-- Philip J. Bunce, Software Consultant
"See MIPS Run is the most complete description of the MIPS Architecture and implementations that exists. In addition to strong technical content, Mr. Sweetman's colorful writing style keeps the reader's interest."
-- Michael Uhler, Director, MIPS Architecture, MIPS Technologies, Inc.
"See MIPS Run is the book for MIPS embedded development, covering basics of MIPS CPU architecture to the issues that you run into as you bring up your first MIPS development system. Dominic brings deep technical content out with concise elegant prose. It is mandatory reading for all my new Applications Engineers. From beginning engineers to the hard core MIPS enthusiast See MIPS Run will sprint you through to a better understanding of MIPS."
--Gregory Stoner, Manager of Applications, MIPS Technologies, Inc.
"this book is the best combination of completeness and readability of any book on the MIPS architecture"
from the foreword by John L. Hennessey, a founder of MIPS
-- Frederick Emmons Terman Dean of Engineering, Stanford University
The versatile offspring of an extended family of multiple chip companies, today's MIPS chips are everywhere. They power everything from videogames, network routers, laser printers, set-top boxes, and high-performance workstations. This book brings together this extraordinary proliferation of form and functionality, offering embedded systems programmers and designers unique, eminently practical insights into MIPS. It covers how MIPS started, the principles at the root of the RISC revolution, the full details of the MIPS instruction set, and how these details together constitute a full operating system ready to be put to work in hundreds of ways.
If you're programming embedded systems and need to understand the chips at the deepest level, or even if you're just curious, you're sure to find what you need in this book. It's all here, from the nuts and bolts of a programming reference to the big picture that only a true expert can deliver. So buy the book. Take it home. Step inside. And see MIPS run.
- Written by an independent consultant whose business is understanding MIPS architecture and embedded systems programming.
- Addresses the evolution of MIPS technology, giving you a solid foundation for successful designs and implementations.
- Provides an in-depth, easy-to-use guide to the MIPS instruction set, including special attention to processor control and assembler mnemonics for every instruction.
- Covers everything from MIPS I to MIPS IV, with appendices devoted to the optional MIPS 16 instruction set and V/MDMX.
Dominic Sweetman is a member of the last generation of programmers who could reasonably hope to understand computer systems from bottom to top. His rich career began with low-level coding, progressing from OS development to LANs to distributed systems. Dominic is an experienced designer and developer of hardware systems, CPUs, networks, and operating systems. He was a founder member of Whitechapel Workstations, and in 1988 founded Algorithmics, a MIPS consulting firm of which he is the director. Dominic lives with his partner, two grown-up children and three cats in north London.
Style and Limits
RISCs and MIPS
Coprocessor 0: MIPS Processor Control
Caches for MIPS
Exceptions, Interrupts, and Initialization
Memory Management and the TLB
Complete Guide to the MIPS Instruction Set
Assembler Language Programming
C Programming on MIPS
Portability Considerations and C Code
Appendix A Instruction Timing and Optimization
Appendix B Assembler Language Syntax
Appendix C Object Code
Appendix D Evolving MIPS