Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools (Hardcover)

Joseph A. Fisher, Paolo Faraboschi, Cliff Young





The fact that there are more embedded computers than general-purpose computers and that we are impacted by hundreds of them every day is no longer news. What is news is that their increasing performance requirements, complexity and capabilities demand a new approach to their design.

Fisher, Faraboschi, and Young describe a new age of embedded computing design, in which the processor is central, making the approach radically distinct from contemporary practices of embedded systems design. They demonstrate why it is essential to take a computing-centric and system-design approach to the traditional elements of nonprogrammable components, peripherals, interconnects and buses. These elements must be unified in a system design with high-performance processor architectures, microarchitectures and compilers, and with the compilation tools, debuggers and simulators needed for application development.

In this landmark text, the authors apply their expertise in highly interdisciplinary hardware/software development and VLIW processors to illustrate this change in embedded computing. VLIW architectures have long been a popular choice in embedded systems design, and while VLIW is a running theme throughout the book, embedded computing is the core topic. Embedded Computing examines both in a book filled with fact and opinion based on the authors many years of R&D experience.


Table of Contents:


Chapter 1: An Introduction to Embedded Processing
1.1 What is Embedded Computing?
1.2 Distinguishing Between Embedded and General Purpose Computing
1.3 Characterizing Embedded Computing
1.4 Embedded market structure
1.5 Further Reading
1.6 Exercises

Chapter 2: An Overview of VLIW and ILP
2.1 Semantics and parallelism
2.2 Design philosophies
2.3 Role of the compiler
2.4 VLIW in the embedded and DSP domains
2.5 Historical Perspective and Further Reading
2.6 Exercises

Chapter 3: An Overview of ISA Design
3.1 Overview: What to Hide
3.2 Basic VLIW design principles
3.3 Designing a VLIW ISA for Embedded Systems
3.4 Instruction-Set Encoding
3.5 VLIW Encoding
3.6 Encoding and Instruction-Set Extensions
3.7 Further Reading
3.8 Exercises

Chapter 4: Architectural Structures in ISA design
4.1 The Datapath
4.2 Registers and Clusters
4.3 Memory Architecture
4.4 Branch Architecture
4.5 Speculation and Predication
4.6 System Operations
4.7 Further Reading
4.8 Exercises

Chapter 5: Microarchitecture Design
5.1 Register File Design
5.2 Pipeline Design
5.3 VLIW Fetch, Sequencing and Decoding
5.4 The Datapath
5.5 Memory Architecture
5.6 Control Unit
5.7 Control Registers
5.8 Power Considerations
5.9 Further Reading
5.10 Exercises

Chapter 6: System Design and Simulation
6.1 System-on-Chip (SoC)
6.2 Processor Cores and System-On-Chip
6.3 Overview of Simulation
6.4 Simulating a VLIW architecture
6.5 System simulation
6.6 Validation and verification
6.7 Further Reading
6.8 Exercises

Chapter 7: Embedded Compiling and Toolchains
7.1 What is important in an ILP Compiler?
7.2 Embedded cross-development toolchains
7.3 Structure of an ILP compiler
7.4 Code Layout
7.5 Embedded-specific trade-offs for compilers
7.6 DSP-Specific Compiler Optimizations
7.7 Further Reading
7.8 Exercises

Chapter 8: Compiling for VLIWs and ILP
8.1 Profiling
8.2 Scheduling
8.3 Register allocation
8.4 Speculation and Predication
8.5 Instruction selection
8.6 Further Reading
8.7 Exercises

Chapter 9: The Run-time System
9.1 Exceptions, interrupts, and traps
9.2 Application Binary Interface considerations
9.3 Code Compression
9.4 Embedded Operating Systems
9.5 Multiprocessing and Multithreading
9.6 Further Reading
9.7 Exercises

Chapter 10: Application Design and Customization
10.1 Programming Language choices
10.2 Performance, Benchmarking and Tuning
10.3 Scalability and Customizability
10.4 Further Reading
10.5 Exercises

Chapter 11: Application Areas
11.1 Digital Printing and Imaging
11.2 Telecom applications
11.3 Other application areas
11.4 Further Reading
11.5 Exercises

Appendix A: The VEX System
Appendix B: Glossary
Appendix C: Bibliography