Network Processor Design : Issues and Practices, Volume 1 (Paperback)

Mark A. Franklin, Patrick Crowley, Haldun Hadimioglu, Peter Z. Onufryk

  • 出版商: Morgan Kaufmann
  • 出版日期: 2002-10-01
  • 售價: $2,980
  • 貴賓價: 9.5$2,831
  • 語言: 英文
  • 頁數: 338
  • 裝訂: Paperback
  • ISBN: 1558608753
  • ISBN-13: 9781558608757
  • 相關分類: Web-crawler 網路爬蟲
  • 立即出貨 (庫存 < 4)

買這商品的人也買了...

商品描述

More than a proceedings, Network Processors 2002: Design Principles and Practices presents the results of this workshop. The workshop participants have enhanced and edited their original papers to address the comments they received from colleagues. The keynote talk by Bill Dally of Stanford University has also been revised especially for this text. In addition, the editors have gathered completely new material from practicing designers who discuss the latest network processors manufactured by their companies. Network Processors 2002: Design Principles and Practices is an essential reference on network processors for graduate students, researchers and practicing designers.

Contents


Preface  
 
Chapter 1. Network Processors: An Introduction to Design Issues, Patrick Crowley, Mark Franklin, Haldun Hadimioglu, and Peter Onufryk  
 
Part 1. Design Principles  
 
Chapter 2. Benchmarking Network Processors, Prashant R. Chandra, Frank Hady, Raj Yavatkar, Tony Bock,Mason Cabot and Philip Mathew  
 
Chapter 3. A Methodology and Simulator for the Study of Network Processors, Deepak Suryanarayanan, Gregory T. Byrd and John Marshall  
 
Chapter 4. Design Space Exploration of Network Processor Architectures, Lothar Thiele, Samarjit Chakraborty, Matthias Gries and Simon Künzli  
 
Chapter 5. Compiler Back-end Optimizations for Network Processors with Bit Packet Addressing, Jens Wagner and Rainer Leupers  
 
Chapter 6. A Network Processor Performance and Design Model with Benchmark Parameterization, Mark A. Franklin and Tilman Wolf  
 
Chapter 7. A Benchmarking Methodology for Network Processors, Mel Tsai, Chidamber Kulkarni, Christian Sauer, Niraj Shah and Kurt Keutzer  
 
Chapter 8. A Modeling Framework for Network Processor Systems, Patrick Crowley and Jean-Loup Baer  
 
Part 2. Practices  
 
Chapter 9. An Industry Analyst's Perspective on Network Processors, John Freeman  
 
Chapter 10. Agere Systems - Communications Optimized PayLoadPlus Network Processor Architecture, Bill Klein  
 
Chapter 11. Cisco Systems - Toaster 2, John Marshall  
 
Chapter 12. IBM - PowerNP Network Processor, Mohammad Peyravian, Jean Calvignac and Ravi Sabhikhi  
 
Chapter 13. Intel Corporation - Intel ® IXP2400 Network Processor: A 2nd Generation Intel ® NPU, Prashant Chandra, Sridhar Lakshmanamurthy and Raj Yavatkar  
 
Chapter 14. Motorola - C5e Network Processor, Eran Cohen Strod and Patricia Johnson  
 
Chapter 15. PMC-Sierra, Inc - ClassiPI, Vineet Dujari, Remby Taas and Ajit Shelat  
 
Chapter 16 TranSwitch - ASPEN: Flexible Network Processing for Access Solutions, Subhash C. Roy

商品描述(中文翻譯)

《網絡處理器 2002:設計原則與實踐》不僅僅是一個會議記錄,還呈現了這次研討會的成果。研討會參與者根據同事們的評論對他們的原始論文進行了改進和編輯。史丹佛大學的比爾·達利(Bill Dally)的主題演講也特別為本書進行了修訂。此外,編輯還從實踐設計師那裡收集了完全新的材料,他們討論了他們公司最新生產的網絡處理器。《網絡處理器 2002:設計原則與實踐》是研究生、研究人員和實踐設計師在網絡處理器方面的必備參考資料。

目錄:
前言
第一章 網絡處理器:設計問題介紹,Patrick Crowley, Mark Franklin, Haldun Hadimioglu, and Peter Onufryk
第一部分 設計原則
第二章 網絡處理器基準測試,Prashant R. Chandra, Frank Hady, Raj Yavatkar, Tony Bock,Mason Cabot and Philip Mathew
第三章 用於研究網絡處理器的方法和模擬器,Deepak Suryanarayanan, Gregory T. Byrd and John Marshall
第四章 網絡處理器架構的設計空間探索,Lothar Thiele, Samarjit Chakraborty, Matthias Gries and Simon Künzli
第五章 面向位元封包定址的網絡處理器編譯器後端優化,Jens Wagner and Rainer Leupers
第六章 具有基準參數化的網絡處理器性能和設計模型,Mark A. Franklin and Tilman Wolf
第七章 網絡處理器基準測試方法論,Mel Tsai, Chidamber Kulkarni, Christian Sauer, Niraj Shah and Kurt Keutzer
第八章 網絡處理器系統的建模框架,Patrick Crowley and Jean-Loup Baer
第二部分 實踐
第九章 網絡處理器的行業分析師觀點,John Freeman
第十章 Agere Systems - 通信優化的 PayLoadPlus 網絡處理器架構,Bill Klein
第十一章 Cisco Systems - Toaster 2,John Marshall
第十二章 IBM - PowerNP 網絡處理器,Mohammad Peyravian, Jean Calvignac and Ravi Sabhikhi
第十三章 Intel Corporation - Intel ® IXP2400 網絡處理器:第二代 Intel ® NPU,Prashant Chandra, Sridhar Lakshmanamurthy and Raj Yavatkar
第十四章 Motorola - C5e 網絡處理器,Eran Cohen Strod and Patricia Johnson