Area Array Packaging Processes: for BGA, Flip Chip, and CSP
暫譯: 區域陣列封裝流程：針對BGA、翻轉晶片及CSP

This engineering reference covers the most important solders and materials in modern electronic packaging. Written by a team of world-class professionals and researchers, Area Array Packaging Materials includes vital information necessary for the design of cutting-edge electronics products.

Contents ：           

   Introduction
   Next Generation Flip Chip Materials and Processes
    Concepts
    Cost Analysis
    High-Throughput FC Processing Using No-Flow Analysis
    Wafer-Level FC Processing
    Analysis of Next Generation FC Processes
    Compression Flow Placement Model & Analysis
    Modeling and Analysis of Chip Floating
   Flip Chip Assembly and Underfilling
    Process Overview
    Substrate Design
    Assembly with Capillary Flow Underfill
    Assembly with Fluxing Underfills
    Water-Applied Underfills
    Reliability
   BGA and CSP Rework
    Rework Process Considerations
    Basic Network Setups
    Identification of Process Yield Problems
    Component Reballing Considerations
    Analysis Using X-Ray Inspection
   BGA Assembly Reliability
    BGA and QFP Comparison
    BGA Thermal Cycling
    CBGA Failure Mechanisms
    PBGA Failure Mechanisms
    Shock and Thermal Cycling
    BGA Conclusions for Quality and Reliability Programs
   Die Attach and Rework
    Polymer Basics
    Die-Attach Materials
    Die-Attach Application Methods
    Applications
    Properties
    Reliability
    Rework
   Liquid Encapsulation Equipment and Processes
    Encapsulation Materials
    Encapsulation Methods
    Platform Design and Construction
    Dispensing Head
    Needles
    Pumps
    System Control
   Molding for Area Array Packages
    Molding Materials
    Transfer Molding Equipment
    Molding Processes
    Tooling
    Productivity and Cost
    Reliability
   References
   Contributors and Affiliations: