Power Integrity for I/O Interfaces: With Signal Integrity/ Power Integrity Co-Design (美國原版)

Vishram S. Pandit, Woong Hwan Ryu, Myoung Joon Choi

Power Integrity for I/O Interfaces: With Signal Integrity/ Power Integrity Co-Design (美國原版)
  • 出版商: Prentice Hall
  • 出版日期: 2010-10-15
  • 售價: $3,980
  • 貴賓價: 9.5 折 $3,781
  • 語言: 英文
  • 頁數: 416
  • 裝訂: Hardcover
  • ISBN: 0137011199
  • ISBN-13: 9780137011193

    • 立即出貨

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Foreword by Joungho Kim

 

The Hands-On Guide to Power Integrity in Advanced Applications, from Three Industry Experts

 

In this book, three industry experts introduce state-of-the-art power integrity design techniques for today’s most advanced digital systems, with real-life, system-level examples. They introduce a powerful approach to unifying power and signal integrity design that can identify signal impediments earlier, reducing cost and improving reliability.

 

After introducing high-speed, single-ended and differential I/O interfaces, the authors describe on-chip, package, and PCB power distribution networks (PDNs) and signal networks, carefully reviewing their interactions. Next, they walk through end-to-end PDN and signal network design in frequency domain, addressing crucial parameters such as self and transfer impedance. They thoroughly address modeling and characterization of on-chip components of PDNs and signal networks, evaluation of power-to-signal coupling coefficients, analysis of Simultaneous Switching Output (SSO) noise, and many other topics.

 

Coverage includes

• The exponentially growing challenge of I/O power integrity in high-speed digital systems

• PDN noise analysis and its timing impact for single-ended and differential interfaces

• Concurrent design and co-simulation techniques for evaluating all power integrity effects on signal integrity

• Time domain gauges for designing and optimizing components and systems

• Power/signal integrity interaction mechanisms, including power noise coupling onto signal trace and noise amplification through signal resonance

• Performance impact due to Inter Symbol Interference (ISI), crosstalk, and SSO noise, as well as their interactions

• Validation techniques, including low impedance VNA measurements, power noise measurements, and characterization of power-to-signal coupling effects

 

Power Integrity for I/O Interfaces will be an indispensable resource for everyone concerned with power integrity in cutting-edge digital designs, including system design and hardware engineers, signal and power integrity engineers, graduate students, and researchers.

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