High Speed A/D Converters - Understanding Data Converters Through SPICE (Hardcover)
Alfi Moscovici
- 出版商: Springer
- 出版日期: 2000-12-31
- 售價: $860
- 貴賓價: 9.8 折 $843
- 語言: 英文
- 頁數: 230
- 裝訂: Hardcover
- ISBN: 079237276X
- ISBN-13: 9780792372769
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商品描述
High Speed A/D Converters: Understanding Data Converters Through SPICE is intended as a learning tool by providing building blocks that can be stacked on top of each other to build higher order systems. The book provides a guide to understanding the various topologies used in A/D converters by suggesting simple methods for the blocks used in an A/D converter. The converters discussed throughout the book constitute a class of devices called undersampled or Nyquist converters.
The tools used in deriving the results presented are:
- TopSpice™ by Penzar - a mixed mode SPICE simulator - version 5.90. The files included in Appendix A were written for this tool. However, most circuit files need only minor adjustments to be used on other SPICE simulators such as PSpice, Hspice, IS_Spice and Micro-Cap IV;
- Mathcad 2000 - Professional by Mathsoft. This tool is very useful in performing FFT analysis as well as drawing some of the graphs. Again, the mathcad files are included to help the user analyze the data.
High Speed A/D Converters: Understanding Data Converters Through SPICE not only supplies the models for the A/D converters for SPICE program but also describes the physical reasons for the converter's performance.
Contents
Acknowledgements. Preface. A/D Terminology. 1.1. The Static Parameters. 1.2. The Dynamic Parameters. 1.3. The FFT Analysis. The Comparator. 1.1. Comparator Macro-Model. 1.2. Comparator Delay Relative to Input Overdrive. 1.3. Propagation Delay Relative to Slew Rate. 1.4. Pulse Reproduction Fidelity. 1.5. CMOS Comparator Model. Flash A/D. 1.1. A practical 3-B A/D. 1.2. A 6-B A/D. 1.3. ILE/DLE Effects on SINAD. 1.4. Delay Between Analog-Input and Clock. 1.5. Slew Rate Limitation. Track and Hold Amplifier. 1.1. THA - The SPICE Model. 1.2. Errors Affecting THA Accuracy. SAR A/D. 1.1. Physical Limitations in SAR A/D. 1.2. Time Interleaved Converters. Folding A/D Converters. 1.1. The Analog Preprocessor. 1.2. Folding Preprocessor - An Example. 1.3. The Linear Interpolator. 1.4. Folding 8-B A/D - An Example. Pipelined A/D Converter. 1.1. Component Accuracy Requirements. 1.2. Errors in a Practical Pipelined A/D. 1.3. Errors Correction - An Example. 1.4. Residue A/D Error. Serial Pipeline A/D With 1.5-Bit/Stage. 1.1. An 8-Bit Serial Pipelined A/D - Example. Bibliography. Index.