FPGA Simulation: A Complete Step-By-Step Guide

FPGA Simulation: A Complete Step-by-Step Guide shows FPGA design engineers how to avoid long lab debug sessions by simulating with SystemVerilog. The book helps engineers to have never simulated their designs before by bringing them through seven steps that can be added incrementally to a design flow. Engineers start with code coverage as the first step. Succeeding steps introduce test planning, assertions, and SystemVerilog simuation techniques. By the end of the process engineers who have never simulated before will know how to create complete self-checking test benches that generate their own stimulus, and demonstrate complete functional coverage. This book is a must for engineers who are facing DO-254 certification requirements on their next FPGA project.

《FPGA模擬：完整的逐步指南》向FPGA設計工程師展示如何通過使用SystemVerilog進行模擬，避免長時間的實驗室調試。本書通過七個步驟引導從未進行過設計模擬的工程師，這些步驟可以逐步添加到設計流程中。工程師從代碼覆蓋率作為第一步開始。接下來的步驟介紹了測試計劃、斷言和SystemVerilog模擬技術。在過程結束時，從未進行過模擬的工程師將知道如何創建完整的自檢測測試平台，生成自己的刺激信號，並展示完整的功能覆蓋率。對於下一個FPGA項目需要面對DO-254認證要求的工程師來說，本書是必讀之作。