Digital System Design using FSMs: A Practical Learning Approach

Minns, Peter D.



This is a complete update of the authors earlier book, FSM-Based Digital Design using Verilog HDL (Wiley 2008). Whilst the essential foundation content remains, the book has been considerably refreshed to cover the design of Finite State Machines (FSM) in place of Microprocessors, using a novel form of State Machines based on Toggle Flip Flops (TFF) and Data Flip Flops (DFF). It follows a Linear Programmed Learning approach, enabling the reader to learn at their own pace, and to design their own FSM based systems.


這是作者早期書籍《使用Verilog HDL進行基於FSM的數字設計》(Wiley 2008)的完整更新。儘管基礎內容保持不變,但書籍已經進行了相當大的更新,以涵蓋有限狀態機(FSM)的設計,而不是微處理器,使用一種基於切換型觸發器(TFF)和數據型觸發器(DFF)的新型狀態機形式。它採用線性程式化學習方法,讓讀者能夠按照自己的節奏學習,並設計自己的基於FSM的系統。


Dr Peter D. Minns, Formally Senior Lecturer in the Department of Mathematics, Physics and Electrical Engineering at Northumbria University at Newcastle. Now retired, Dr Minns worked as an academic Senior Lecturer for some 33 years in which he taught FSM and Digital Electronics, and computer programming with microprocessors and microcontrollers. Prior to academia, he worked in the telecommunications industry, then in Power System Protection as a Design and Development Engineer at many levels including relay logic, TTL, CMOS, FPGA. Whilst working at the University he was also involved with Knowledge Based Learning with Knowledge Transfer Partnerships (KTP) between the University and Industry.


Dr Peter D. Minns,曾任英國紐卡素北安布里亞大學數學、物理和電子工程系的高級講師。現已退休,Minns博士在學術界擔任高級講師達33年之久,教授有限狀態機(FSM)和數字電子學,以及使用微處理器和微控制器進行計算機編程。在從事學術工作之前,他曾在電信行業工作,然後在電力系統保護領域擔任設計和開發工程師,涉及繼電器邏輯、TTL、CMOS和FPGA等多個層次。在大學期間,他還參與了大學與工業界之間的知識轉移合作項目,進行基於知識的學習。