Digital VLSI Systems Design: A Design Manual for Implementation of Projects on FPGAs and ASICs using Verilog (Hardcover)

Description

• Details, step-by-step, how to design VLSI systems using Verilog
• Provides hands-on experience on the popular industrial CAD tools
• Shows the way to design systems that are device, vendor and technology independent
• Offers thorough knowledge of cracking complex algorithms and mapping it on FPGA/ASIC
• Prepares students to suit industries and research labs from day one

Digital VLSI Systems Design is written for an advanced level course using Verilog and is meant for undergraduates, graduates and research scholars of Electrical, Electronics, Embedded Systems, Computer Engineering and interdisciplinary departments such as Bio Medical, Mechanical, Information Technology, Physics, etc. It serves as a reference design manual for practicing engineers and researchers as well. Diligent freelance readers and consultants may also start using this book with ease. The book presents new material and theory as well as synthesis of recent work with complete Project Designs using industry standard CAD tools and FPGA boards, enabling the serious readers to design VLSI Systems on their own. The reader is taken step by step through the design right from implementing a single digital gate to a massive design consuming well over 100,000 gates. The Verilog codes developed for these designs are universal and can work on any FPGA or ASIC and are technology independent. The book presents the development of novel algorithms and architectures for optimum realization of high tech. products. All the design codes developed in this book are Register Transfer Level (RTL) compliant and can be readily used or amended to suit new projects.

描述

本書《Digital VLSI Systems Design》是針對使用Verilog進行高級水平課程的讀者而寫的，適用於電氣、電子、嵌入式系統、計算機工程以及生物醫學、機械、信息技術、物理等跨學科部門的本科生、研究生和研究學者。它也是一本供實踐工程師和研究人員參考的設計手冊。勤奮的自由讀者和顧問也可以輕鬆開始使用本書。本書介紹了新的材料和理論，並結合了最近的工作，使用行業標準CAD工具和FPGA板進行完整的項目設計，使認真的讀者能夠自行設計VLSI系統。讀者將從實現單個數字閘到消耗超過100,000個閘的大型設計的每一步進行設計。為這些設計開發的Verilog代碼是通用的，可以在任何FPGA或ASIC上工作，並且與技術無關。本書介紹了用於高科技產品最佳實現的新算法和架構的開發。本書中開發的所有設計代碼都符合註冊轉移級（RTL）的要求，可以直接使用或修改以適應新項目。