Verilog for Digital Design

Frank Vahid, Roman Lysecky

  • 出版商: Wiley
  • 出版日期: 2007-07-09
  • 售價: $23,080
  • 貴賓價: 9.5$21,926
  • 語言: 英文
  • 頁數: 192
  • 裝訂: Paperback
  • ISBN: 0470052627
  • ISBN-13: 9780470052624
  • 相關分類: Verilog
  • 下單後立即進貨 (約1~3週)




* VHSIC Hardware Description Language is commonly used as a design entry language
* Both this book and Digital Design with Verilog are valuable supplements to Digital Design, depending on which HDL is right for the reader
* Features numerous examples and tips in the margins
* Focuses on application and use of the language, rather than just teaching the basics of the language
Table of Contents
Chapter 1 Introduction

Chapter 2 Combinational Design Logic

Chapter 3 Sequential Logic Design--Controllers

Chapter 4 Datapath Components

Chapter 5 Register-Transfer Level (RTL) Design

Chapter 6 Optimizations and Tradeoffs

Chapter 7 Physical Implementation

Chapter 8 Programmable Processors

Chapter 9 Hardware Description Languages

Appendix A: Boolean Algebra