Principles of Modern Digital Design (Hardcover)
暫譯: 現代數位設計原則 (精裝版)
Parag K. Lala
- 出版商: Wiley
- 出版日期: 2007-07-16
- 售價: $5,910
- 貴賓價: 9.5 折 $5,615
- 語言: 英文
- 頁數: 436
- 裝訂: Hardcover
- ISBN: 0470072962
- ISBN-13: 9780470072967
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商品描述
Description
A major objective of this book is to fill the gap between traditional logic design principles and logic design/optimization techniques used in practice. Over the last two decades several techniques for computer-aided design and optimization of logic circuits have been developed. However, underlying theories of these techniques are inadequately covered or not covered at all in undergraduate text books. This book covers not only the "classical" material found in current text books but also selected materials that modern logic designers need to be familiar with.
Table of Contents
1. Number Systems and Binary Codes.2. Fundamental Concepts of Digital Logic.
3. Combinational Logic Design.
4. Fundamentals of Synchronous Sequential Circuits.
5. VHDL in Digital Design.
6. Combinational Logic Design using VHDL.
7. Synchronous Sequential Circuit Design.
8. Counter Design.
9. Sequential Circuit Design using VHDL.
10. Asynchronous Sequential Circuits.
Appendix A. CMOS Logic.
Index.
商品描述(中文翻譯)
**描述**
本書的一個主要目標是填補傳統邏輯設計原則與實際使用的邏輯設計/優化技術之間的空白。在過去的二十年中,已經開發出幾種用於邏輯電路的計算機輔助設計和優化技術。然而,這些技術的基本理論在本科教科書中往往未得到充分涵蓋或根本沒有涵蓋。本書不僅涵蓋當前教科書中所找到的「經典」材料,還包括現代邏輯設計師需要熟悉的選定材料。
**目錄**
1. 數字系統與二進制碼。
2. 數位邏輯的基本概念。
3. 組合邏輯設計。
4. 同步序列電路的基本原理。
5. 數位設計中的 VHDL。
6. 使用 VHDL 的組合邏輯設計。
7. 同步序列電路設計。
8. 計數器設計。
9. 使用 VHDL 的序列電路設計。
10. 非同步序列電路。
附錄 A. CMOS 邏輯。
索引。
作者簡介
PARAG K. LALA, PHD, DSc(ENG), is the Cary and Lois Patterson Chair of Electrical Engineering at Texas A&M University-Texarkana. Dr. Lala is the author of five books, including Fault-Tolerant and Fault-Testable Hardware Design and Practical Digital Logic Design and Testing. Dr. Lala was named a Fellow of the IEEE for "contributions to the development of self-checking logic and associated checker design." He is also a Fellow of The Institution of Engineering and Technology, United Kingdom.
作者簡介(中文翻譯)
PARAG K. LALA 博士,DSc(ENG),是德克薩斯農工大學-泰克薩卡納分校的電機工程系 Cary 和 Lois Patterson 教授。Lala 博士是五本書的作者,包括《容錯與可測試硬體設計》和《實用數位邏輯設計與測試》。Lala 博士因「對自檢邏輯及相關檢查器設計的貢獻」而被授予 IEEE 會士稱號。他也是英國工程技術學會的會士。