Design Recipes for FPGAs, 2/e : Using Verilog and VHDL (Paperback)

Peter Wilson

  • 出版商: Newnes
  • 出版日期: 2015-09-25
  • 售價: $2,200
  • 貴賓價: 9.5$2,090
  • 語言: 英文
  • 頁數: 392
  • 裝訂: Paperback
  • ISBN: 0080971296
  • ISBN-13: 9780080971292
  • 相關分類: FPGAVerilog
  • 立即出貨 (庫存=1)



This book provides a rich toolbox of design techniques and templates to solve practical, every-day problems using FPGAs. Using a modular structure, it provides design techniques and templates at all levels, together with functional code, which you can easily match and apply to your application. Written in an informal and easy to grasp style, this invaluable resource goes beyond the principles of FPGAs and hardware description languages to demonstrate how specific designs can be synthesized, simulated and downloaded onto an FPGA. In addition, the book provides advanced techniques to create ‘real world’ designs that fit the device required and which are fast and reliable to implement.

  • Examples are rewritten and tested in Verilog and VHDL
  • Describes high-level applications as examples and provides the building blocks to implement them, enabling the student to start practical work straight away
  • Singles out the most important parts of the language that are needed for design, giving the student the information needed to get up and running quickly



  • 示例已在Verilog和VHDL中重新編寫和測試

  • 以高級應用程序作為示例,並提供實現它們的基本組件,使學生能夠立即開始實際工作

  • 選出了設計所需的語言中最重要的部分,為學生提供了快速上手所需的信息